74ACT08SC_Q Fairchild Semiconductor, 74ACT08SC_Q Datasheet

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74ACT08SC_Q

Manufacturer Part Number
74ACT08SC_Q
Description
Logic Gates Qd 2-Input AND Gate
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of 74ACT08SC_Q

Product Category
Logic Gates
Product
AND
Logic Family
74ACT
Number Of Gates
4
Number Of Lines (input / Output)
2 / 1
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Propagation Delay Time
9 ns
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC-14
Minimum Operating Temperature
- 40 C
Number Of Input Lines
2
Number Of Output Lines
1
© 1999 Fairchild Semiconductor Corporation
74AC08 • 74ACT08
General Description
The AC/ACT08 contains four, 2-input AND gates.
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. (PC not available in Tape and Reel.)
Logic Symbol
Pin Descriptions
FACT
Order Number
Quad 2-Input AND Gate
74AC08SC
74AC08SJ
74AC08MTC
74AC08PC
74ACT08SC
74ACT08MTC
74ACT08PC
is a trademark of Fairchild Semiconductor Corporation.
Package Number
MTC14
MTC14
IEEE/IEC
M14A
M14D
M14A
N14A
N14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
A
O
Pin Names
n
n
DS009914
, B
n
Inputs
Outputs
Features
Connection Diagram
Description
I
Outputs source/sink 24 mA
CC
reduced by 50% on 74AC only
Package Description
November 1988
Revised November 1999
www.fairchildsemi.com

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74ACT08SC_Q Summary of contents

Page 1

... Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. (PC not available in Tape and Reel.) Logic Symbol IEEE/IEC Pin Descriptions FACT is a trademark of Fairchild Semiconductor Corporation. © 1999 Fairchild Semiconductor Corporation Features I reduced by 50% on 74AC only ...

Page 2

Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. 0. Input Voltage ( Output Diode Current ( ...

Page 3

DC Electrical Characteristics for ACT Symbol Parameter V Minimum HIGH Level IH Input Voltage V Maximum LOW Level IL Input Voltage V Minimum HIGH Level OH Output Voltage V Maximum LOW Level OL Output Voltage I Maximum Input Leakage Current ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body www.fairchildsemi.com Package Number M14A 4 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide www.fairchildsemi.com Package Number MTC14 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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