79RC32H434-300BC IDT, 79RC32H434-300BC Datasheet - Page 31
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79RC32H434-300BC
Manufacturer Part Number
79RC32H434-300BC
Description
Processors - Application Specialized
Manufacturer
IDT
Datasheet
1.79RC32H434-266BCGI.pdf
(53 pages)
Specifications of 79RC32H434-300BC
Part # Aliases
IDT79RC32H434-300BC
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- Download datasheet (431Kb)
SPI
SCK
SDI
SDO
SCK, SDI,
SDO
IDT RC32434
1.
Signal
In SPI mode, the SCK period and sampling edge are programmable. In PCI mode, the SCK period is fixed and the sampling edge is rising.
1
Thigh_15a,
Symbol
Tlow_15a
Tper_15a
Thld_15b
Tpw_15e
Tsu_15b
Tdo_15c
SDO
SDO
SCK
SCK
SDI
SDI
Reference
SCK rising or
SCK rising or
Tper_15a
Tper_15a
Edge
Control bits CPOL = 0, CPHA = 0 in the SPI Control Register, SPC.
falling
falling
None
None
MSB
MSB
Control bits CPOL = 0, CPHA = 1 in the SPI Control Register, SPC.
Figure 16 SPI AC Timing Waveform — Clock Polarity 0, Clock Phase 0
Figure 17 SPI AC Timing Waveform — Clock Polarity 0, Clock Phase 1
2(ICLK)
MSB
MSB
Min
100
40
60
60
266MHz
0
bit 6
bit 6
Tdo_15c
bit 6
166667
83353
bit 6
Max
—
—
60
—
Table 13 SPI AC Timing Characteristics
Tsu_15b
bit 5
bit 5
2(ICLK)
bit 5
bit 5
Min
100
40
60
60
300MHz
0
Thigh_15a
Thigh_15a
Tdo_15c
bit 4
bit 4
31 of 53
166667
83353
Max
bit 4
60
—
—
—
bit 4
Tsu_15b
bit 3
bit 3
Tlow_15a
Tlow_15a
2(ICLK)
Thld_15b
Min
100
bit 3
40
60
60
bit 3
350MHz
0
bit 2
bit 2
166667
83353
Max
60
bit 2
—
—
—
bit 2
Thld_15b
bit 1
bit 1
2(ICLK)
Min
100
40
60
60
400MHz
bit 1
0
bit 1
LSB
LSB
166667
83353
Max
60
—
—
—
LSB
LSB
Unit
ns
ns
ns
ns
ns
ns
Condi-
tions
Bit I/O
SPI
SPI
SPI
SPI
SPI
January 19, 2006
See Figures
16, 17, and 18.
See Figures
16, 17, and 18.
Reference
Diagram
Timing
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