MCIMX6U5DVM10AB Freescale Semiconductor, MCIMX6U5DVM10AB Datasheet - Page 47

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MCIMX6U5DVM10AB

Manufacturer Part Number
MCIMX6U5DVM10AB
Description
Processors - Application Specialized i.MX6 DualLite
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet

Specifications of MCIMX6U5DVM10AB

Rohs
yes
Core
ARM Cortex A9
Processor Series
i.MX6
Data Bus Width
32 bit
Maximum Clock Frequency
1 GHz
Data Ram Size
256 kB
Operating Supply Voltage
1.175 V to 1.5 V
Mounting Style
SMD/SMT
Package / Case
FCBGA-624
Interface Type
I2C, I2S, SDIO, UART, USB
Memory Type
L1/L2 Cache, ROM, SRAM

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCIMX6U5DVM10AB
Manufacturer:
NXP/恩智浦
Quantity:
20 000
2. Calibration is done against 240 Ω external reference resistor.
3. Output driver impedance deviation (calibration accuracy) is ±5% (max/min impedance) across PVTs.
4.8.3
The LVDS interface complies with TIA/EIA 644-A standard. See, TIA/EIA STANDARD 644-A,
“Electrical Characteristics of Low Voltage Differential Signaling (LVDS) Interface Circuits” for details.
4.9
This section contains the timing and electrical parameters for the modules in each i.MX 6Solo/6DualLite
processor.
4.9.1
Figure 8
4.9.2
Figure 9
Freescale Semiconductor
CC1
ID
shows the reset timing and
shows the WDOG reset timing and
System Modules Timing
Duration of POR_B to be qualified as valid (input slope = 5 ns)
LVDS I/O Output Buffer Impedance
Reset Timings Parameters
WDOG Reset Timing Parameters
i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 1
(Output)
WDOG_B
(Input)
POR_B
Figure 9. WDOG_B Timing Diagram
Table 35. Reset Timing Parameters
Table 35
Figure 8. Reset Timing Diagram
Parameter
Table 36
lists the timing parameters.
CC1
lists the timing parameters.
CC3
Min
1
Electrical Characteristics
Max
RTC_XTALI
Unit
cycle
47

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