74LVQ02TTR STMicroelectronics, 74LVQ02TTR Datasheet

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74LVQ02TTR

Manufacturer Part Number
74LVQ02TTR
Description
Logic Gates Quad 2-Input NOR
Manufacturer
STMicroelectronics
Datasheet

Specifications of 74LVQ02TTR

Product Category
Logic Gates
Rohs
yes
Product
NOR
Logic Family
74LVQ
Number Of Gates
4
Number Of Lines (input / Output)
2 / 1
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Propagation Delay Time
10.5 ns, 7.5 ns
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-14
Minimum Operating Temperature
- 55 C
Number Of Input Lines
2
Number Of Output Lines
1
Factory Pack Quantity
2500

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Part Number:
74LVQ02TTR
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DESCRIPTION
The 74LVQ02 is a low voltage CMOS QUAD
2-INPUT NOR GATE fabricated with sub-micron
silicon gate and double-layer metal wiring C
Figure 1: Pin Connection And IEC Logic Symbols
July 2004
HIGH SPEED:
t
COMPATIBLE WITH TTL OUTPUTS
LOW POWER DISSIPATION:
I
LOW NOISE:
V
75 TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I
PCI BUS LEVELS GUARANTEED AT 24 mA
BALANCED PROPAGATION DELAYS:
t
OPERATING VOLTAGE RANGE:
V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 02
IMPROVED LATCH-UP IMMUNITY
PD
CC
PLH
OH
OLP
CC
= 5 ns (TYP.) at V
= 2 A(MAX.) at T
| = I
(OPR) = 2V to 3.6V (1.2V Data Retention)
= 0.3V (TYP.) at V
t
PHL
OL
= 12mA (MIN) at V
LOW VOLTAGE CMOS QUAD 2-INPUT NOR GATE
A
CC
=25°C
CC
= 3.3 V
= 3.3V
CC
= 3.0V
2
MOS
Table 1: Order Codes
technology. It is ideal for low power and low noise
3.3V applications.
The internal circuit is composed of 3 stages
including buffer output, which enables high noise
immunity and stable output.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PACKAGE
TSSOP
SOP
SOP
Rev. 5
74LVQ02
74LVQ02MTR
74LVQ02TTR
TSSOP
T & R
1/11

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74LVQ02TTR Summary of contents

Page 1

... All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. 2 MOS 74LVQ02 SOP TSSOP PACKAGE T & R SOP 74LVQ02MTR TSSOP 74LVQ02TTR Rev. 5 1/11 ...

Page 2

Figure 2: Input And Output Equivalent Circuit Table 4: Absolute Maximum Ratings Symbol V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current OK ...

Page 3

Table 6: DC Specifications Symbol Parameter V V High Level Input IH Voltage 3.0 to 3.6 V Low Level Input IL Voltage V High Level Output OH Voltage 3.0 V Low Level Output OL Voltage 3.0 I Input Leakage I ...

Page 4

Table 8: AC Electrical Characteristics (C Symbol Parameter Propagation Delay 2.7 PLH PHL Time 3.3 t Output To Output 2.7 OSLH Skew Time t OSHL 3.3 (note1 Skew is defined as the absolute value ...

Page 5

Figure 3: Waveform - Propagation Delays (f=1MHz; 50% duty cycle) 74LVQ02 5/11 ...

Page 6

DIM. MIN. A 1.35 A1 0.1 A2 1.10 B 0.33 C 0.19 D 8. 5.8 h 0.25 L 0.4 k 0° ddd 6/11 SO-14 MECHANICAL DATA mm. TYP MAX. 1.75 0.25 1.65 0.51 0.25 8.75 ...

Page 7

TSSOP14 MECHANICAL DATA DIM. MIN 0.05 A2 0.8 b 0.19 c 0.09 D 4.9 E 6.2 E1 4.3 e 0.65 BSC K 0˚ PIN 1 IDENTIFICATION 1 mm. TYP MAX. MIN. 1.2 ...

Page 8

DIM. MIN 12 2.1 Po 3.9 P 7.9 8/11 Tape & Reel SO-14 MECHANICAL DATA mm. TYP MAX. 330 13.2 22.4 6.6 9.2 2.3 4.1 8.1 inch ...

Page 9

Tape & Reel TSSOP14 MECHANICAL DATA mm. DIM. MIN. TYP A C 12 6.7 Bo 5.3 Ko 1.6 Po 3.9 P 7.9 MAX. MIN. 330 13.2 0.504 0.795 2.362 22.4 6.9 0.264 5.5 0.209 ...

Page 10

Table 11: Revision History Date Revision 29-Jul-2004 5 10/11 Description of Changes Ordering Codes Revision - pag. 1. ...

Page 11

... No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics ...

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