MC33988CHFKR2 Freescale Semiconductor, MC33988CHFKR2 Datasheet

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... PWR V DD MCU Figure 1. 33988 Simplified Application Diagram Freescale Semiconductor, Inc. reserves the right to change the detail specifications, as may be required, to permit improvements in the design of its products. © Freescale Semiconductor, Inc., 2010-2012. All rights reserved. Device (For Tape and Reel, add an R2 Suffix) ...

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... Blanking Time 0.15ms–155ms Over-temperature Detection GND VPWR Over-voltage Protection Selectable Slew Rate Gate Drive Low Detection 3.75A –12.5A Open Load Detection HS0 HS1 Selectable Output Current Recopy 1/10250 or 1/20500 CSNS Analog Integrated Circuit Device Data Freescale Semiconductor HS0 HS1 ...

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... FS Output Fault Status (Active Low) 6 FSI Input 7 CS Input 8 SCLK Input 9 SI Input 10 VDD Input Analog Integrated Circuit Device Data Freescale Semiconductor PIN CONNECTIONS GND 14 VPWR 15 16 HS1 HS0 Formal Name This pin is used to output a current proportional to the designated HS0-1 output ...

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... This pin connects to the positive power supply and is the source input Positive Power Supply of operational power for the device. Protected 8.0mΩ high side power output to the load. High Side Output 1 Protected 8.0mΩ high side power output to the load. High Side Output 0 page 16. Definition Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Active clamp energy using single-pulse method (L = 16mH ESD1 testing is performed in accordance with the Human Body Model (HBM accordance with the Charge Device Model (CDM), Robotic (Czap=4.0pF). Analog Integrated Circuit Device Data Freescale Semiconductor ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS Symbol V ...

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... ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics. 33988 6 Symbol STG R θ θ JA (6), (7) T PPRT Value Unit ° 125 - 40 to 150 ° 150 C ° C/W <1.0 30 °C Note 7 Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Under-voltage Power-ON Reset Notes 8. This applies to all internal device logic supplied This applies when the under-voltage fault is not latched (IN 0). Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 5.5V, 6.0V ≤ V ≤ 27V, -40°C ≤ PWR = 25°C under nominal conditions, unless otherwise noted. A ...

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... 37 10.5 12.5 14.5 9.0 11.25 13.5 8.0 10.0 12.0 7.0 8.75 10.5 6.0 7.5 9.0 5.0 6.25 7.5 4.0 5.0 6.0 3.0 3.75 4.5 – – 1/10250 – – 1/20500 – – 20 -14 – 14 -13 – 13 -12 – 12 -13 – 13 -13 – PWR Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Output OFF Open Load Detection Current is the current required to flow through the load for the purpose of detecting the existence of an open load condition when the specific output is commanded OFF. 12. Guaranteed by process monitoring. Not production tested. Analog Integrated Circuit Device Data Freescale Semiconductor STATIC ELECTRICAL CHARACTERISTICS ≤ 5.5V, 6.0V ≤ V ≤ 27V, -40°C ≤ PWR = 25° ...

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... V – – 100 200 400 kΩ – 4 7.0 – 2.0 – - 0.3 V 0.8 V – – – 0.2 0.4 μA - 5.0 0 5.0 μA 5.0 – 20 kΩ – 0 1.0 6.0 6.5 7 Infinite – RST Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Turn-ON delay time measured from rising edge of IN[0:1] signal that would turn the output load. 21. Turn-OFF delay time measured from falling edge that would turn the output OFF to V Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 5.5V, 6.0V ≤ V ≤ 27V, -40°C ≤ PWR = 25° ...

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... WDTO Freescale Semiconductor ...

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... Time required for output status data to be terminated at SO. 1.0kΩ on pull-up on 29. Time required to obtain valid data out from SO following the rise of SCLK. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 5.5V, 6.0V ≤ V ≤ 27V, -40°C ≤ PWR = 25°C under nominal conditions, unless otherwise noted. ...

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... SRrA t Tdly(off) Figure 4. Output Slew Rate and Time Delays t OCLx Figure 5. Overcurrent Shutdown OCHx OCL3 OCL2 OCL1 SRfB SR & SR FB_SLOW FB_FAST SRfA SR & SR FA_SLOW & t DLY_SLOW(OFF) DLY_FAST(OFF) t OCH Time Time t OCL0 Analog Integrated Circuit Device Data Freescale Semiconductor FA_FAST ...

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... SO SO 0.2 VDD Low-to-High Low to High SO SO 0.7 VDD High to Low High-to-Low Figure 8. SCLK Waveform and Valid SO Data Delay Time Analog Integrated Circuit Device Data Freescale Semiconductor • During t , OCHX OCLX current level. • During t OCL3 programmed to detect RSI t ...

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... The MCU ensures data is available upon the falling edge of SCLK. The logic state of SI present upon the rising edge of SCLK loads that bit command into the internal command shift register. pins pulled-up Logic HIGH CS , SPI Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... OFF condition) so long as the is Logic HIGH only active when the Analog Integrated Circuit Device Data Freescale Semiconductor is asserted Logic LOW. The generated SO output signals are CMOS logic levels. SO output data is available on the falling edge of SCLK and transitions immediately on the rising edge of SCLK ...

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... The reported fault conditions are: open load, short-circuit to ground (OCLO-resistive and OCHI-severe short-circuit), thermal shutdown, and under/over-voltage. In Fail-safe mode, the loads are controlled with dedicated parallel input pins. The device is configured in default mode. SELF-PROTECTED HIGH SIDE SWITCH HS [0:1] Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... FAIL-SAFE AND WATCHDOG If the FSI input is not grounded, the watchdog timeout detection is active when either the WAKE or Analog Integrated Circuit Device Data Freescale Semiconductor OPERATIONAL MODES transitions from Logic [0] to Logic [1]. The WAKE input is capable of being pulled resistance that limits the internal clamp current according to the specification ...

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... Under these conditions, the output’s gates are enhanced to keep the junction temperature less than 150°C. The ON resistance of the output is fairly similar to that in the Normal mode. No additional passive components are required. Analog Integrated Circuit Device Data Freescale Semiconductor , are illustrated in Figure 6. ), the OCx ...

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... While VDD remains within specified range. ∗∗∗ equivalent to IN direct input or IN_spi SPI input. Analog Integrated Circuit Device Data Freescale Semiconductor disconnection. A 10K resistor needs to be added between the wake pin and the rest of the circuitry in order to ensure that ...

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... OD7 OD6 OD5 OD4 OD3 OD2 is a Logic [1] state during the above operation. . The device transfers status CS . The SO output driver is enabled when CS should transition from a Logic [ Logic [0] has an active internal CS D0 OD0 OD1 Analog Integrated Circuit Device Data Freescale Semiconductor CS ...

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... Used to configure the inputs, outputs, and the device protection features and SO status content. Used to configure the inputs, outputs, and LSB D0 the device protection features and SO status content. Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... A Logic [1] on bit D3 disables the open load (OL) detection feature. SOCL0 Over-current Low Detection (D0) (Amperes) 0 12.5 1 11.25 0 10.0 1 8.75 0 7.5 1 6.25 0 5.0 1 3.75 Over-current High Detection (Amperes) 50 37.5 12. Note that these timeouts apply Timing 155ms 10ms 1.2ms 150 μ s Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... ON with a single command. There are eight selectable output switching delay times that range from 0ms to 525ms. Refer to Table 13. Analog Integrated Circuit Device Data Freescale Semiconductor Table 13. Switching Delay Turn ON Delay (ms) OSD [2:0] (D2 : D0) 000 001 010 ...

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... OVF FAULT IN1_SPI CSNS0 IN0_SPI EN EN SOCL2s SOCL1s SOCL0s CD_DIS s OCLT1s OCLT0s IN DIS s A/O s OSD2 OSD1 OSD0 WDTO WD1 WD0 IN0 Pin FSI Pin WAKE Pin – – UV_dis OV_dis – – – – Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... OD3 reports if the open load circuitry is active. Previous Address SOA[2:0] =100 The returned data contain the programmed values in the DICR. Analog Integrated Circuit Device Data Freescale Semiconductor Previous Address SOA[2:0] = 101 • SOA3 = 0. The returned data contain the programmed OD2 OD1 OD0 values in the OSDR ...

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... Development effort will be required by the end users to optimize the board design and PCB layout in order to reach electromagnetic compatibility standards (emission and immunity). V PWR 14 VPWR 2.5µF 10nF 15 HS1 16 HS0 LOAD LOAD 13 GND Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... TYPICAL APPLICATIONS Figure 13. Maximum Turn-off Current Versus Inductive Load (Single Pulse for R 33988 and 150°C Initial) L PWR J Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... SOLDERING INFORMATION The 33988 is packaged in a surface mount power package (PQFN), intended to be soldered directly on the printed circuit board. 33988 30 PACKAGING SOLDERING INFORMATION The AN2467 provides guidelines for Printed Circuit Board design and assembly. Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... For the most current revision of the package, visit Dimensions shown are provided for reference ONLY. Analog Integrated Circuit Device Data Freescale Semiconductor PACKAGE DIMENSIONS www.freescale.com and perform a keyword search on 98ARL10521D. FK SUFFIX 16-PIN PQFN 98ARL10521D ISSUE C PACKAGING PACKAGE DIMENSIONS 33988 31 ...

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... PACKAGING PACKAGE DIMENSIONS (CONTINUED) 33988 32 PACKAGE DIMENSIONS (CONTINUED) FK SUFFIX 16-PIN PQFN 98ARL10521D ISSUE C Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Updated Freescale form and style 6/2012 • Updated values in 8.0 Analog Integrated Circuit Device Data Freescale Semiconductor REVISION HISTORY Output Turn-ON Delay Time in Fast/Slow Slew Rate Output Turn-OFF Delay Time in Fast Slew Rate Mode HS1 Switching Delay Time (OSD[2:0]) Figure 12, Typical Applications ...

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