23A640-I/P Microchip Technology, 23A640-I/P Datasheet - Page 12

• Manufacturer Part Number: 23A640-I/P
• Description: IC SRAM 64KBIT 20MHZ 8DIP
• Manufacturer: Microchip Technology
• Type: Synchronousr

Specifications of 23A640-I/P

• Memory Size: 64K (8K x 8)
• Format - Memory: RAM
• Memory Type: SRAM
• Speed: 20MHz
• Interface: SPI Serial
• Voltage - Supply: 1.7 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Memory Configuration: 8K X 8
• Clock Frequency: 16MHz
• Supply Voltage Range: 1.7V To 1.95V
• Memory Case Style: DIP
• No. Of Pins: 8
• Operating Temperature Range: -40°C To +85°C
• Access Time: 32 ns
• Maximum Clock Frequency: 16 MHz
• Supply Voltage (max): 1.95 V
• Supply Voltage (min): 1.5 V
• Maximum Operating Current: 10 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: Through Hole
• Number Of Ports: 1
• Operating Supply Voltage: 1.8 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

23A640/23K640
3.0
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
3.1
A low level on this pin selects the device. A high level
deselects the device and forces it into Standby mode.
When the device is deselected, SO goes to the high-
impedance state, allowing multiple parts to share the
same SPI bus. After power-up, a low level on CS is
required, prior to any sequence being initiated.
3.2
The SO pin is used to transfer data out of the 23X640.
During a read cycle, data is shifted out on this pin after
the falling edge of the serial clock.
3.3
The SI pin is used to transfer data into the device. It
receives instructions, addresses and data. Data is
latched on the rising edge of the serial clock.
3.4
The SCK is used to synchronize the communication
between a master and the 23X640. Instructions,
addresses or data present on the SI pin are latched on
the rising edge of the clock input, while data on the SO
pin is updated after the falling edge of the clock input.
DS22126B-page 12
Name
HOLD
SCK
V
V
CS
SO
SI
SS
CC
PIN DESCRIPTIONS
Chip Select (CS)
Serial Output (SO)
Serial Input (SI)
Serial Clock (SCK)
PDIP/SOIC
TSSOP
1
2
4
5
6
7
8
PIN FUNCTION TABLE
Chip Select Input
Serial Data Output
Ground
Hold Input
Supply Voltage
Serial Data Input
Serial Clock Input
Function
Preliminary
3.5
The HOLD pin is used to suspend transmission to the
23X640 while in the middle of a serial sequence without
having to retransmit the entire sequence again. It must
be held high any time this function is not being used.
Once the device is selected and a serial sequence is
underway, the HOLD pin may be pulled low to pause
further serial communication without resetting the
serial sequence. The HOLD pin must be brought low
while SCK is low, otherwise the HOLD function will not
be invoked until the next SCK high-to-low transition.
The 23X640 must remain selected during this
sequence. The SI, SCK and SO pins are in a high-
impedance state during the time the device is paused
and transitions on these pins will be ignored. To resume
serial communication, HOLD must be brought high
while
communication will not resume. Lowering the HOLD
line at any time will tri-state the SO line.
Hold functionality is disabled by the STATUS register
bit.
the
Hold (HOLD)
SCK
pin
© 2009 Microchip Technology Inc.
is
low,
otherwise
serial