AT24C128BN-SH-B Atmel, AT24C128BN-SH-B Datasheet
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AT24C128BN-SH-B
Specifications of AT24C128BN-SH-B
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AT24C128BN-SH-B Summary of contents
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... Description The AT24C128B provides 131,072 bits of serial electrically erasable and programma- ble read-only memory (EEPROM) organized as 16,384 words of 8 bits each. The device’s cascadable feature allows up to eight devices to share a common two-wire bus. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential ...
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Absolute Maximum Ratings* Operating Temperature......................................−55°C to +125°C Storage Temperature .........................................−65°C to +150°C Voltage on Any Pin with Respect to Ground ........................................ −1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA Figure 3-1. VCC GND WP ...
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... If the pin is left floating, the WP pin will be internally pulled down to GND. However, due to capacitive coupling that may appear during customer applications, Atmel recommends always connecting the WP pins to a known state. When using a pull-up resistor, Atmel recommends using 10kΩ or less. ...
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... Memory Organization AT24C128B, 128K SERIAL EEPROM: The 128K is internally organized as 256 pages of 64 bytes each. Random word addressing requires a 14-bit data word address. (1) Table 5-1. Pin Capacitance Applicable over recommended operating range from T Symbol Test Condition C Input/Output Capacitance (SDA) I/O C Input Capacitance (A ...
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Table 5-3. AC Characteristics (Industrial Temperature) Applicable over recommended operating range from T erwise noted). Test conditions are listed in Note 2. Symbol Parameter f Clock Frequency, SCL SCL t Clock Pulse Width Low LOW t Clock Pulse Width High ...
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Device Operation CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods (see changes during SCL high periods will indicate a ...
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The device is ready for next communication after above steps have been completed. Figure 6-3. Software Reset Start bit SCL 1 SDA Figure 6-4. Bus Timing ...
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... Upon a compare of the device address, the EEPROM will output a “0” compare is not made, the device will return to a standby state. DATA SECURITY: The AT24C128B has a hardware data protection scheme that allows the user to write protect the whole memory when the WP pin AT24C128B 8 ...
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... The data word address lower six bits are internally incremented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location. When the word address, internally generated, reaches the page boundary, the fol- lowing byte is placed at the beginning of the same page. If more than 64 data words are transmitted to the EEPROM, the data word address will “ ...
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... The address “roll over” during read is from the last byte of the last memory page, to the first byte of the first page. Once the device address with the read/write select bit set to “1” is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out. The microcontroller does not respond with an input “ ...
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Figure 9-3. 5296A–SEEPR–1/08 Figure Sequential Read AT24C128B 9-3). 11 ...
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... AT24C128B Ordering Information Ordering Code AT24C128B-PU (Bulk Form Only) (1) AT24C128BN-SH-B (NiPdAu Lead Finish) (2) AT24C128BN-SH-T (NiPdAu Lead Finish) (1) AT24C128B-TH-B (NiPdAu Lead Finish) (2) AT24C128B-TH-T (NiPdAu Lead Finish) (2) AT24C128BY6-YH-T (NiPdAu Lead Finish) (2) AT24C128BD3-DH-T (NiPdAu Lead Finish) (2) AT24C128BU2-UU-T (3) AT24C128B-W-11 Notes: 1. “-B” denotes bulk. 2. “-T” denotes and tape and reel. SOIC = 4K. TSSOP, dBGA2, and Mini MAP = 5k. SAP = 3K. ...
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Part marking scheme 11.1 8-PDIP TOP MARK Seal Year |---|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|---| |---|---|---|---|---|---|---|---| * Lot Number |---|---|---|---|---|---|---|---| | Pin 1 Indicator (Dot) 11.2 8-SOIC TOP MARK |---|---|---|---|---|---|---|---| ...
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... Y = SEAL YEAR 6: 2006 7: 2007 W 8: 2008 9: 2009 C00 = Country or Origin A AAA = Atmel Lot Number Y = YEAR OF ASSEMBLY XX = ATMEL LOT NUMBER TO COORESPOND WITH NSEB TRACE CODE LOG BOOK. (e. AA, AB, AC,...AX, AY, AZ SEAL YEAR 6: 2006 7: 2007 8: 2008 9: 2009 WW = SEAL WEEK 0: 2010 02 = Week 2 1: 2011 ...
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... J = OCTOBER K = NOVEMBER L = DECEMBER TC = TRACE CODE (ATMEL LOT NUMBERS TO CORRESPOND WITH ATK TRACE CODE LOG BOOK) 5296A–SEEPR–1/ YEAR OF ASSEMBLY XX = ATMEL LOT NUMBER TO COORESPOND WITH NSEB TRACE CODE LOG BOOK. (e. AA, AB, AC,...AX, AY, AZ BUILD YEAR 6: 2006 7: 2007 8: 2008 Etc... 2DBU PYMTC |< ...
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PDIP Top View PLCS Side View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA, for additional information. 2. Dimensions A and L are measured with the ...
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JEDEC SOIC TOP VIEW e e SIDE VIEW Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 ...
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TSSOP Pin 1 indicator this corner N Top View Side View Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, ...
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MAP D Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-229, for proper dimensions, tolerances, datums, etc. 2. Dimension b applies to metallized terminal and is measured between 0.15 mm and 0.30 mm ...
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ULA PIN # TOP VIEW 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT24C128B SIDE VIEW SYMBOL ...
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A1 BALL PAD CORNER e (e1) 1. Dimension 'b' is measured at the maximum solder ball diameter. This drawing is for general information only. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R 5296A–SEEPR–1/ ...
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Revision History Doc. Rev. 5296A AT24C128B 22 Date Comments AT24C128B product with date code 2008 work week 14 (814) or later supports 5Vcc operation 1/2008 Initial document release 5296A–SEEPR–1/08 ...
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... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...