NCL30083BDMR2G ON Semiconductor, NCL30083BDMR2G Datasheet - Page 27

• Manufacturer Part Number: NCL30083BDMR2G
• Description: LED Lighting Drivers Step-Dimm Quasi-Res I-Mode Cntlr
• Manufacturer: ON Semiconductor

Specifications of NCL30083BDMR2G

• Rohs: yes
• Input Voltage: 18 V
• Operating Frequency: 65 kHz
• Maximum Supply Current: 1.2 mA
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: Micro-8
• Minimum Operating Temperature: - 40 C

Zero Crossing Detection Block
voltage of the power MOSFET reaches a valley.
below the V
oscillations, the ZCD comparator may not be able to detect
auxiliary winding is shorted, the controller will continue
switching leading to improper regulation of the LED
current. Moreover during an output short circuit, the
controller will strive to maintain the constant current
operation.
counting when the ZCD voltage is below the V
threshold. If this timer reaches 90 ms, the controller detects
a fault and enters the auto−recovery fault mode (controller
shuts−down and waits 4−s before re−starting switching).
The ZCD pin allows detecting when the drain−source
A valley is detected when the voltage on pin 1 crosses
At startup or in case of extremely damped free
Because of this time−out function, if the ZCD pin or the
In order to avoid these scenarios, a secondary timer starts
high
high
high
high
low
low
low
low
ZCD(THD)
The 2nd valley is detected
By the ZCD comparator
internal threshold.
The 3rd valley
is validated
Figure 66. Time−out Chronograms
ZCD(short)
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The 3rd valley is not detected
account for the missing 3rd valley
the valleys. To avoid such a situation, the NCL30083
features a Time−Out circuit that generates pulses if the
voltage on ZCD pin stays below the V
for 6.5 ms.
detection and simulates a missing valley in case of too
damped free oscillations.
Line Feed−forward
turned−off immediately when the current set−point is
reached. As a result, the primary peak current is higher than
expected and the output current increases. To compensate
the peak current increase brought by the propagation delay,
a positive voltage proportional to the line voltage is added
on the current sense signal. The amount of offset voltage can
be adjusted using the R
on−time.
dimming when the output current drops below 15% of the
programmed output current.
Time−out circuit adds a pulse to
The Time−out also acts as a substitute clock for the valley
Because of the propagation delays, the MOSFET is not
The offset voltage is applied only during the MOSFET
This offset voltage is removed at light load during
by the ZCD comp
LFF
resistor as shown in Figure 67.
ZCD(THD)
14
12
15
16
17
4 3
V ZCD(THD)
2nd,
V ZCD
ZCD comp
TimeOut
Clk
3rd
threshold