MAX16928CGUP/V+T Maxim Integrated, MAX16928CGUP/V+T Datasheet - Page 15

• Manufacturer Part Number: MAX16928CGUP/V+T
• Description: LCD Drivers Automotive TFT Power Supply
• Manufacturer: Maxim Integrated

Specifications of MAX16928CGUP/V+T

• Rohs: yes

R
erence output. Calculate R
equation:
where V
and V
the regulator).
The pass transistor must meet specifications for current
gain (h
voltage, and power dissipation. The transistor’s current
gain limits the guaranteed maximum output current to:
where I
rent, V
age drop, and R
between the transistor’s base and emitter. Furthermore,
the transistor’s current gain increases the regulator’s DC
loop gain (see the
excessive gain destabilizes the output.
The transistor’s saturation voltage at the maximum output
current determines the minimum input-to-output volt-
age differential that the regulator can support. Also, the
package’s power dissipation limits the usable maximum
input-to-output voltage differential. The maximum power-
dissipation capability of the transistor’s package and
mounting must exceed the actual power dissipated in
the device. The power dissipated equals the maximum
load current (I
input-to-output voltage differential:
where V
tor of the transistor, V
output voltage applied to the emitter of the transistor, and
I
external transistor is not short circuit protected.
The device’s negative-gate voltage regulator uses an
internal transconductance amplifier to drive an external
pass transistor. The transconductance amplifier, the
pass transistor, the base-emitter resistor, and the output
capacitor determine the loop stability.
Maxim Integrated
LOAD(MAX)
TOP
FBGL
greater than 20kI to avoid loading down the ref-
BE
FE
DRVN
GL
GL
I
), input capacitance, collector-emitter saturation
LOAD(MAX)
P
is the transistor’s base-to-emitter forward volt-
NPN_GL
Automotive TFT-LCD Power Supply with Boost
R
is the regulated output voltage on the collec-
is the desired output voltage, V
= 0.25V (the regulated feedback voltage of
is the maximum load current. Note that the
BOTTOM
is the minimum guaranteed base-drive cur-
LOAD(MAX)_GL
=
BE
= (V
=
Stability Requirements
is the pulldown resistor connected
(I
CN
R
GL
DRVN
TOP
is the inverting charge-pump
- V
Converter and Gate Voltage Regulators
) multiplied by the maximum
BOTTOM
Pass Transistor Selection
×
CN
−
V
V
R
V
) × I
REF
Stability Requirements
FBGL
BE
BE
LOAD(MAX)
) h
−
×
with the following
V
−
FBGL
FE(MIN)
V
GL
REF
section), so
= 1.25V,
The transconductance amplifier regulates the output volt-
age by controlling the pass transistor’s base current. The
total DC loop gain is approximately:
where V
current through the base-to-emitter resistor (R
the device, the bias current for the negative-gate voltage
regulator is 0.1mA. Therefore, the base-to-emitter resistor
should be chosen to set 0.1mA bias current:
Use the closest standard resistor value of 6.8kI. The
output capacitor and the load resistance create the
dominant pole in the system. However, the internal
amplifier delay, pass transistor’s input capacitance,
and the stray capacitance at the feedback node create
additional poles in the system, and the output capacitor’s
ESR generates a zero. For proper operation, use the fol-
lowing procedure to verify that the regulator is properly
compensated:
1) First, determine the dominant pole set by the regula-
2) The pole created by the internal amplifier delay is
3) Next, calculate the pole set by the transistor’s input
tor’s output capacitor and the load resistor:
The unity-gain crossover frequency of the regulator is:
approximately 1MHz:
capacitance, the transistor’s input resistance, and the
base-to-emitter pullup resistor:
where:
g
f
T
m
is the transition frequency. Both parameters can be
is the transconductance of the pass transistor, and
T
A
f
POLE_GL
is 26mV at room temperature, and I
V_GL
f
=
CROSSOVER
=
f
POLE_IN
R
BE
≅
C
(
f
IN
POLE_AMP
V
=
4
0.1mA
T
=
2
V
=
) (1
π ×
BE
×
2 f
2
g
=
π
π ×
= A
m
C
I
T
+
LOAD(MAX)_GL
OUT_GL
, R
C
I
V_LR
BIAS
0.1mA
IN
= 1MHz
=
IN
0.7V
I
LOAD
MAX16928
×
1
(R
× f
×
h
g
h
×
BE
POLE_LR
FE
m
FE
V
7k
OUT_GL
/R )
) V
×
Ω
IN
REF
BIAS
BE
). For
is the
15