93AA76B-I/SN Microchip Technology, 93AA76B-I/SN Datasheet - Page 7
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93AA76B-I/SN
Manufacturer Part Number
93AA76B-I/SN
Description
IC EEPROM 8KBIT 2MHZ 8SOIC
Manufacturer
Microchip Technology
Datasheet
1.93C76AT-IOT.pdf
(28 pages)
Specifications of 93AA76B-I/SN
Memory Size
8K (512 x 16)
Package / Case
8-SOIC (3.9mm Width)
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
2MHz
Interface
Microwire, 3-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Organization
512 x 16 K
Interface Type
Microwire
Maximum Clock Frequency
1 MHz
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Maximum Operating Current
3 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2.5 V, 3.3 V, 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
2.6
The 93XX76A/B/C powers up in the Erase/Write
Disable (EWDS) state. All programming modes must be
preceded by an Erase/Write Enable (EWEN) instruction.
FIGURE 2-3:
FIGURE 2-4:
2.7
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 8-bit (If ORG pin is low or A-version
devices) or 16-bit (If ORG pin is high or B-version
devices) output string.
FIGURE 2-5:
© 2008 Microchip Technology Inc.
CLK
CLK
CS
DO
CS
DI
CLK
DI
CS
DI
Erase/Write Disable and Enable
(EWDS/EWEN)
Read
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C
High-Z
1
1
1
EWDS TIMING
EWEN TIMING
READ TIMING
1
0
0
0
0
0
A
N
0
1
•••
0
A0
1
0
Dx
x
x
•••
Once the EWEN instruction is executed, programming
remains enabled until an EWDS instruction is executed
or V
To protect against accidental data disturbance, the
EWDS instruction can be used to disable all erase/write
functions and should follow all programming opera-
tions. Execution of a READ instruction is independent of
both the EWEN and EWDS instructions.
The output data bits will toggle on the rising edge of the
CLK and are stable after the specified time delay (T
Sequential read is possible when CS is held high. The
memory data will automatically cycle to the next register
and output sequentially.
•••
•••
D0
CC
is removed from the device.
Dx
x
x
•••
T
T
CSL
CSL
D0
Dx
•••
DS21796K-page 7
D0
PD
).