MAX8741EAI Maxim Integrated, MAX8741EAI Datasheet - Page 16
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MAX8741EAI
Manufacturer Part Number
MAX8741EAI
Description
Current & Power Monitors & Regulators
Manufacturer
Maxim Integrated
Datasheet
1.MAX8741EAI.pdf
(34 pages)
500kHz Multi-Output Power-Supply Controllers
with High Impedance in Shutdown
The output filter capacitors (Figure 1, C1 and C2) set a
dominant pole in the feedback loop that must roll off the
loop gain to unity before encountering the zero intro-
duced by the output capacitor’s parasitic resistance
(ESR) (see the Design Procedure section). A 50kHz
pole-zero cancellation filter provides additional rolloff
above the unity-gain crossover. This internal 50kHz
lowpass compensation filter cancels the zero due to fil-
ter-capacitor ESR. The 50kHz filter is included in the
loop in both fixed-output and adjustable-output modes.
Synchronous rectification reduces conduction losses in
the rectifier by shunting the normal Schottky catch
diode with a low-resistance MOSFET switch. Also, the
synchronous rectifier ensures proper startup of the
boost gate-driver circuit.
If the circuit is operating in continuous-conduction
mode, the DL drive waveform is the complement of the
DH high-side drive waveform (with controlled dead time
to prevent cross-conduction or “shoot-through”). In dis-
continuous (light-load) mode, the synchronous switch is
Table 3. SKIP PWM Table
Figure 4. Main PWM Comparator Block Diagram
16
SKIP
High
High
Low
Low
______________________________________________________________________________________
SLOPE COMPENSATION
Synchronous Rectifier Driver (DL)
CSH_
CSL_
LOAD CURRENT
FB_
REF
Heavy
Heavy
Light
Light
I1
MODE
PWM
PWM
PWM
Idle
R1
I2
V
L
Pulse skipping, supply current = 250µA at V
Constant-frequency PWM continuous-inductor current
Constant-frequency PWM continuous-inductor current
Constant-frequency PWM continuous-inductor current
R2
I3
turned off as the inductor current falls through zero. The
synchronous rectifier works under all operating condi-
tions, including idle mode.
The SECFB signal further controls the synchronous switch
timing in order to improve multiple-output cross-regulation
(see the Secondary Feedback Regulation Loop section).
An internal regulator produces the 5V supply (V
powers the PWM controller, logic, reference, and other
blocks within the IC. This 5V low-dropout linear regula-
tor supplies up to 25mA for external loads, with a
reserve of 25mA for supplying gate-drive power.
Bypass V
Important: Ensure that V
Measure V
pumped above 5.5V, either excessive boost-diode
capacitance or excessive ripple at V+ is the probable
cause. Use only small-signal diodes for the boost cir-
cuit (10mA to 100mA Schottky or 1N4148 are pre-
ferred), and bypass V+ to PGND with 4.7µF directly at
the package pins.
L
to GND with 4.7µF.
L
V
UNCOMPENSATED
HIGH-SPEED
LEVEL TRANSLATOR
AND BUFFER
BIAS
with the main output fully loaded. If it is
DESCRIPTION
Internal V
OUTPUT DRIVER
IN
=12V, discontinuous inductor
L
L
does not exceed 6V.
and REF Supplies
TO PWM
LOGIC
L
) that