11AA02E48-I/SN Microchip Technology, 11AA02E48-I/SN Datasheet - Page 5
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11AA02E48-I/SN
Manufacturer Part Number
11AA02E48-I/SN
Description
IC EEPROM 2KBIT 100KHZ 8SOIC
Manufacturer
Microchip Technology
Datasheet
1.11AA02E48T-ITT.pdf
(18 pages)
Specifications of 11AA02E48-I/SN
Memory Size
2K (256 x 8)
Format - Memory
EEPROMs - Serial (with MAC Address)
Memory Type
EEPROM
Speed
100kHz
Interface
UNI/O™ (Single Wire)
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Memory Configuration
256 X 8
Ic Interface Type
UNI/O
Clock Frequency
100kHz
Supply Voltage Range
1.8V To 5.5V
Memory Case Style
SOIC
No. Of Pins
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
11AA02E48-I/SN
Manufacturer:
MICROCHIP
Quantity:
2 190
2.0
2.1
The 11AA02E48 family of serial EEPROMs support
the UNI/O
microcontrollers, including Microchip’s PIC
trollers, ASICs, or any other device with an available
discrete I/O line that can be configured properly to
match the UNI/O protocol.
The 11AA02E48 devices contain an 8-bit instruction
register. The devices are accessed via the SCIO pin.
Data is embedded into the I/O stream through
Manchester encoding. The bus is controlled by a
master device which determines the clock period, con-
trols the bus access and initiates all operations, while
the 11AA02E48 works as slave. Both master and
slave can operate as transmitter or receiver, but the
master device determines which mode is active.
FIGURE 2-1:
© 2008 Microchip Technology Inc.
SCIO
Note:
I/O Control
Current-
Limited
Control
STATUS
FUNCTIONAL DESCRIPTION
Principles of Operation
Register
Slope
Logic
®
This data sheet documents only the
device’s features and specifications that
are in addition to the features and specifi-
cations of the 11AA020 device. For infor-
mation on the features and specifications
shared by the 11AA02E48 and 11AA020
devices, see the “11AAXXX/11LCXXX
Family Data Sheet” (DS22067).
protocol. They can be interfaced with
V
V
CC
SS
Memory
BLOCK DIAGRAM
Control
Logic
Dec
X
Y Decoder
Sense Amp.
R/W Control
Page Latches
HV Generator
EEPROM
®
Array
microcon-
Preliminary
11AA02E48
DS22122A-page 5