MAX8903JETI+ Maxim Integrated, MAX8903JETI+ Datasheet - Page 23

• Manufacturer Part Number: MAX8903JETI+
• Description: Battery Management 2A 1-Cell Li+ DC-DC USB/Adapter Charger
• Manufacturer: Maxim Integrated
• Series: MAX8903A, MAX8903B, MAX8903C, MAX8903D, MAX8903E, MAX8903G, MAX8903H, MAX8903J, MAX8903Yr

Specifications of MAX8903JETI+

• Rohs: yes
• Battery Type: Li-Ion
• Output Voltage: 5 V
• Output Current: 1 mA
• Operating Supply Voltage: 4.1 V to 16 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Charge Safety Timers: Yes
• Maximum Power Dissipation: 1666.7 mW
• Operating Supply Current: 2.3 mA
• Product Type: Charge Management
• Temperature Monitoring: Yes
• Uvlo Start Threshold: 3.2 V

on-time constraints (t
fixed minimum on-time valley current regulator.
Versions of the MAX8903 with f
smallest L OUT while delivering good efficiency with low
input voltages (5V or 9V). For applications that use high
input voltages (12V), the MAX8903G with f
is the best choice because of its higher efficiency.
For a given maximum output voltage, the minimum
inductor ripple current condition occurs at the lowest
input voltage that allows the regulator to maintain f
operation. If the minimum input voltage dictates an off-
time less than t
ple condition occurs just before the regulator enters
fixed minimum off-time operation. To allow the current-
mode regulator to provide a low-jitter, stable duty factor
operation, the minimum inductor ripple current
(I
minimum inductor ripple current condition. The maxi-
mum allowed output inductance L
obtained using the equations (1) and (2) below.
(1)
otherwise,
where t
output voltage, and V
age.
(2)
where L
To obtain a small-sized inductor with acceptable core
loss, while providing stable, jitter-free operation at the
advertised f
obtained by choosing an appropriate ripple factor K, and
picking an available inductor in the range inductance
yielded by equations (2), (3), and (4). L
not be lower than the minimum allowable inductance as
shown in Table 6. The recommended ripple factor ranges
from (0.2 ≤ K ≤ 0.45) for (2A ≥ I
(3)
where t
Maxim Integrated
L_RIPPLE_MIN
t
OFF
OFF
OFF
OUT _ MAX
=
L
t
OUT MIN T
is the off-time, V
OFFMIN
is the minimum off-time obtained from (1).
SW
t
L
OFF
OUT MAX
, the actual output inductance (L
) should be greater than 150mA in the
_
OFFMIN
=
is the maximum allowed inductance.
_
⎛
⎜ ⎜
⎝
if
1
_
⎛
⎜
⎝
DC(MIN)
−
ONMIN
1
OFF
, then the minimum inductor rip-
V
−
V
=
SYS MAX
V
DC MIN
V
SYS MAX
V
DC MIN
SYS(MAX)
=
I
SYS MAX
(
L RIPPLE MIN
(
), the regulator becomes a
(
_
(
V
is minimum DC input volt-
SDLIM
SYS MAX
(
)
K
)
)
)
⎞
⎟ ×
⎠
SW
(
×
OUT_MAX
⎞
⎟
⎠
)
is maximum charger
× ×
≥ 1A) designs.
f
×
I
_
SW
SDLIM
= 4MHz offer the
f
1
SW
)
t
1
OFF
OUT
×
t
≤
OFF
SW
t
is therefore
should also
OFFMIN
2A 1-Cell Li+ DC-DC Chargers
= 1MHz
OUT
for USB and Adapter Power
,
), is
SW
MAX8903A–E/G/H/J/N/Y
(4)
where V
the minimum charger output voltage, and t
time at high input voltage, as given by the following
equation:
(5)
otherwise,
The saturation current DC rating of the inductor (I
must be greater than the DC step-down output current
limit (I
as given by equation (6).
(6)
where IL
obtained from (7) and (8).
(7)
(8)
Good design minimizes ground bounce and voltage gra-
dients in the ground plane, which can result in instability
or regulation errors. The GND and PGs should connect to
the power-ground plane at only one point to minimize the
effects of power-ground currents. Battery ground should
connect directly to the power-ground plane. The ISET
and IDC current-setting resistors should connect directly
to GND to avoid current errors. Connect GND to the
exposed pad directly under the IC. Use multiple tightly
spaced vias to the ground plane under the exposed pad
to help cool the IC. Position input capacitors from DC,
SYS, BAT, and USB to the power-ground plane as close
as possible to the IC. Keep high current traces such as
those to DC, SYS, and BAT as short and wide as possi-
ble. Refer to the MAX8903A Evaluation Kit for a suitable
PCB layout example.
L
IL
OUT MIN t
SDLIM
t
RIPPLE MIN T
ON
IL
DC(MAX)
RIPPLE_MAX
RIPPLE MIN T
_
=
) plus one-half the maximum ripple current,
I
t
SAT
ONMIN
_
t
_
ON
_
is maximum input voltage, V
ON
>
_
=
I
SDLIM
if
=
V
is the greater of the ripple currents
ON
V
_
⎛
⎜
⎝
SYS MIN
DC MAX
(
V
V
V
OFF
SYS MIN
DC MAX
PCB Layout and Routing
DC MAX
=
(
(
(
+
(
(
V
(
IL
=
DC MAX
)
)
RIPPLE MAX
V
⎝
×
K
)
(
)
SYS MAX
)
×
f
−
SW
×
1
f
V
2
(
SW
1
SYS MIN
L
)
I I
SDLIM
_
OUT
−
L
⎞
⎟
⎠
V
O
(
)
SYS MIN
≤ ≤ t
U U T
×
ONMIN
t
ON
OFF
(
)
)
SYS(MIN)
×
is the on-
)
t
ON
)
,
×
t
SAT
ON
23
is
)