93LC56C-I/ST Microchip Technology, 93LC56C-I/ST Datasheet - Page 7

• Manufacturer Part Number: 93LC56C-I/ST
• Description: IC EEPROM 2KBIT 3MHZ 8TSSOP
• Manufacturer: Microchip Technology

Specifications of 93LC56C-I/ST

• Memory Size: 2K (256 x 8 or 128 x 16)
• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Speed: 2MHz, 3MHz
• Interface: Microwire, 3-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-TSSOP
• Memory Configuration: 256 X 8 / 128 X 16
• Ic Interface Type: Microwire
• Clock Frequency: 3MHz
• Supply Voltage Range: 2.5V To 5.5V
• Memory Case Style: TSSOP
• No. Of Pins: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.4
The ERASE instruction forces all data bits of the speci-
fied address to the logical ‘1’ state. CS is brought low
following the loading of the last address bit. This falling
edge of the CS pin initiates the self-timed program-
ming cycle, except on ‘93C’ devices where the rising
edge of CLK before the last address bit initiates the
write cycle.
FIGURE 2-1:
FIGURE 2-2:
© 2007 Microchip Technology Inc.
CLK
CLK
DO
DO
CS
DI
CS
DI
Erase
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
High-Z
High-Z
1
1
ERASE TIMING FOR 93AA AND 93LC DEVICES
ERASE TIMING FOR 93C DEVICES
1
1
1
1
A
A
N
N
A
A
N
N
-1 A
-1 A
N
N
-2
-2
•••
•••
The DO pin indicates the Ready/Busy status of the
device if CS is brought high after a minimum of 250 ns
low (T
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been erased and
the device is ready for another instruction.
A0
A0
Note:
T
T
CSL
CSL
CSL
). DO at logical ‘0’ indicates that programming
After the Erase cycle is complete, issuing
a Start bit and then taking CS low will clear
the Ready/Busy status from DO.
T
WC
T
T
T
SV
WC
SV
Check Status
Check Status
Busy
Busy
Ready
Ready
DS21794E-page 7
High-Z
High-Z
T
T
CZ
CZ