24C01C/SN Microchip Technology, 24C01C/SN Datasheet - Page 4

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24C01C/SN

Manufacturer Part Number
24C01C/SN
Description
IC EEPROM 1KBIT 400KHZ 8SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of 24C01C/SN

Memory Size
1K (128 x 8)
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (3.9mm Width)
Memory Configuration
128 X 8 / 64 X 16
Ic Interface Type
I2C
Clock Frequency
400kHz
Supply Voltage Range
4.5V To 5.5V
Memory Case Style
SOIC
No. Of Pins
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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24C01C
2.0
2.1
This is a bidirectional pin used to transfer addresses
and data into and data out of the device. It is an open
drain terminal, therefore the SDA bus requires a pull-up
resistor to V
400 kHz).
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
2.2
This input is used to synchronize the data transfer from
and to the device.
2.3
The levels on these inputs are compared with the
corresponding bits in the slave address. The chip is
selected if the compare is true.
Up to eight 24C01C devices may be connected to the
same bus by using different Chip Select bit combina-
tions. These inputs must be connected to either V
V
2.4
This pin is utilized for testing purposes only. It may be
tied high, tied low or left floating.
2.5
The 24C01C employs a V
which disables the internal erase/write logic if the V
is below 3.8 volts at nominal conditions.
The SCL and SDA inputs have Schmitt Trigger and
filter circuits which suppress noise spikes to assure
proper device operation even on a noisy bus.
DS21201G-page 4
SS
.
PIN DESCRIPTIONS
SDA Serial Data
SCL Serial Clock
A0, A1, A2
Test
Noise Protection
CC
(typical 10 kΩ for 100 kHz, 2 kΩ for
CC
threshold detector circuit
CC
CC
or
3.0
The 24C01C supports a bidirectional 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as transmitter, and a device
receiving data as receiver. The bus has to be controlled
by a master device which generates the Serial Clock
(SCL), controls the bus access, and generates the Start
and Stop conditions, while the 24C01C works as slave.
Both master and slave can operate as transmitter or
receiver, but the master device determines which mode
is activated.
FUNCTIONAL DESCRIPTION
© 2007 Microchip Technology Inc.

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