TSS461F-TDRZ-9 Atmel, TSS461F-TDRZ-9 Datasheet - Page 9
TSS461F-TDRZ-9
Manufacturer Part Number
TSS461F-TDRZ-9
Description
Network Controller & Processor ICs Van Data Link Controller
Manufacturer
Atmel
Datasheet
1.TSS461F-TDRZ-9.pdf
(57 pages)
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Oscillator
7615A–AUTO–02/06
An oscillator is integrated in the TSS461F, and consists of an inverting amplifier which the input
is XTAL1 and the output XTAL2.
A parallel resonance quartz crystal or ceramic resonator must be connected to these pins. As
shown in Figure 2, two capacitors have to be connected from the crystal pins to ground. The val-
ues of C1 depend on the frequency chosen and can be selected using the graphic given in
Figure 34.
If the oscillator is not used, then a clock signal must be fed to the circuit via the XTAL1 input.
Note, that this pin will behave as a CMOS level compatible Schmitt trigger input.
In this case, the XTAL2 output should be left unconnected. The oscillator also features a buff-
ered clock output pin CKOUT. The signal on this pin is directly buffered from the XTAL1 input,
without inversion.
There is one more pin used for the oscillator. The TEST/VSS pin is in fact its ground, and unless
this pin is firmly connected to ground, with decoupling capacitors, the oscillator will not operate
correctly.
The test mode itself, i.e., when the TEST/VSS pin is held high, is only intended for factory use,
and the functionality of this mode is not specified in any way.
Furthermore, it is subject to change without notice, the only exception being for incoming inspec-
tion tests using the test program.
The clock signal is then fed to the clock generator generate all the necessary timing signals for
the operation of the circuit. The clock generator is controlled by a 4-bit code called the clock
divider.
F
TSCLK
=
F
------------------
n 16
XTAL1
×
TSS461F
9
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