DS21Q554BN Maxim Integrated, DS21Q554BN Datasheet - Page 12
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DS21Q554BN
Manufacturer Part Number
DS21Q554BN
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS21Q554BN.pdf
(13 pages)
Specifications of DS21Q554BN
Part # Aliases
90-21Q55-4BN
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS21Q554BN+
Manufacturer:
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DALLAS SEMICONDUCTOR
POWER SUPPLY DE-COUPLING
In a typical PCB layout for the DS21x5y, all of the VDD pins will connect to a common power plane and all
the VSS lines will connect to a common ground plane. There are three recommended methods for de-
coupling shown below in both schematic and pictorial form. As shown in the pictorials, the capacitors
should be symmetrically located about the device. The first shown in figure 3 uses standard capacitors,
two 33uf tantalums, two .33uf ceramics and two .01uf ceramics. The second method shown in figure 4
uses a single 68uf tantalum, two .33uf ceramics and two .01uf ceramics. The third method shown in figure
5 uses only four capacitors, two 1.5uf MLC and two .01uf ceramics. The 1.5uf is an MLC (Multi Layer
Ceramic) type. The MLC construction is a low inductance type, which allows a smaller value of
capacitance to be used. Since VDD and VSS signals will typically pass vertically to the power and ground
planes of a PCB, the de-coupling caps must be placed as close to the DS21Qx5y as possible and routed
vertically to power and ground planes.
De-coupling scheme using standard tantalum caps. Figure 3
33
De-coupling scheme using single 68uf cap. Figure 4
De-coupling scheme using MCL caps. Figure 5
All capacitor values in figures 3, 4 and 5 are in uf.
December 29, 1998
68
.33
1.5
.33
VDD
VDD
VDD
.01
.01
.01
DS21Qx5y
DS21Qx5y
DS21Qx5y
DS21Q352/DS21Q552/DS21Q354/DS21Q554 Preliminary Data Sheet
1.5
.33
33
VDD
VDD
VDD
.33
.01
.01
.01
.33
.01
33
1.5
.01
.33
.01
68
DS21Qx5y
DS21Qx5y
DS21Qx5y
.33
.01
33
1.5
.33
.01
.01
12