74AUP1T34GM-G NXP Semiconductors, 74AUP1T34GM-G Datasheet - Page 23

• Manufacturer Part Number: 74AUP1T34GM-G
• Description: Buffers & Line Drivers 1.8V SINGLE INVERTER (UNBUFF)
• Manufacturer: NXP Semiconductors

Specifications of 74AUP1T34GM-G

• Product Category: Buffers & Line Drivers
• Rohs: yes
• Number Of Input Lines: 3
• Number Of Output Lines: 1
• Polarity: Non-Inverting
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 1.1 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-886-6
• High Level Output Current: - 4 mA
• Logic Family: AUP
• Logic Type: CMOS
• Low Level Output Current: 4 mA
• Minimum Operating Temperature: - 40 C
• Number Of Channels Per Chip: 1
• Propagation Delay Time: 32.9 ns at 1.1 V to 1.3 V
• Factory Pack Quantity: 5000
• Part # Aliases: 74AUP1T34GM,115

NXP Semiconductors
18. Contents
1
2
3
4
5
6
6.1
6.2
7
8
9
10
11
12
13
14
15
16
16.1
16.2
16.3
16.4
17
18
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 20
Legal information. . . . . . . . . . . . . . . . . . . . . . . 21
Contact information. . . . . . . . . . . . . . . . . . . . . 22
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 21
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2012.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [e-mail]
Low-power dual supply translating buffer
74AUP1T34
Document identifier: 74AUP1T34
Date of release: 16 March 2012
All rights reserved.