PI74ALVCH16501A Pericom Semiconductor, PI74ALVCH16501A Datasheet

PI74ALVCH16501A

Manufacturer Part Number

PI74ALVCH16501A

Description

IC UNIV BUS TXRX 16BIT 56TSSOP

Manufacturer

Pericom Semiconductor

Series

74ALVCHr

Datasheet

1.PI74ALVCH16501A.pdf (5 pages)

Specifications of PI74ALVCH16501A

Logic Type

Universal Bus Transceiver

Number Of Circuits

16-Bit

Current - Output High, Low

24mA, 24mA

Voltage - Supply

2.3 V ~ 3.6 V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

56-TSSOP

Lead Free Status / RoHS Status

Contains lead / RoHS non-compliant

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Product Features

Logic Block Diagram

PI74ALVCH16501 is designed for low voltage operation

Hysteresis on all inputs

Typical V

< 0.8V at V

Typical V

< 2.0V at V

Bus Hold retains last active bus state during 3-STATE

eliminating the need for external pullup resistors

Industrial operation at –40°C to +85°C

Packages available:

– 48-pin 240 mil wide plastic TSSOP (A)

– 48-pin 300 mil wide plastic SSOP (V)

= 2.3V to 3.6V

OHV

OLP

= 3.3V, T

(Output Ground Bounce)

(Output V

= 25°C

Undershoot)

Product Description

Pericom Semiconductor’s PI74ALVCH series of logic circuits are

produced in the Company’s advanced 0.5 micron CMOS technology,

achieving industry leading speed.

The 18-bit PI74ALVCH16501 univeral bus transceiver is designed

for 2.3V to 3.6V V

Data flow in each direction is controlled by Output Enable (OEAB

and OEBA), Latched Enable (LEAB and LEBA), and CLOCK

(CLKAB and CLKBA) inputs. For A-to-B data flow, the device

operates in the transparent mode when LEAB is HIGH. When LEAB

is LOW, the A data is latched if CLKAB is held at a high or low logic

level. If LEAB is LOW, the A-bus is stored in the latch/flip-flop on

the low-to-high transition of CLKAB. When OEAB is HIGH, the

outputs are active. When OEAB is LOW, the outputs are in the high-

impedance state.

Data flow for B to A is similar to that of A to B but uses OEBA, LEBA,

and CLKBA. The Output Enables are complementary (OEAB is

active HIGH and OEBA is active LOW).

To ensure the high-impedance state during power up or power

down, OEBA should be tied to V

OEAB should be tied to GND through a pulldown resistor; the

minimum value of the resistor is determined by the current-sinking

capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating

data inputs at a valid logic level.

18-Bit Universal Bus Transceiver

operation.

PI74ALVCH16501

With 3-State Outputs

through a pull-up resistor and

PS8133A

01/31/00

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PI74ALVCH16501A Summary of contents

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... PI74ALVCH16501 18-Bit Universal Bus Transceiver With 3-State Outputs Product Description Pericom Semiconductor’s PI74ALVCH series of logic circuits are produced in the Company’s advanced 0.5 micron CMOS technology, achieving industry leading speed. The 18-bit PI74ALVCH16501 univeral bus transceiver is designed for 2.3V to 3.6V V operation ...

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... Minimum limits are guaranteed but not tested on Propagation Delays. Operating Characteristics 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com ( ± 25º Pericom Semiconductor Corporation 5 PI74ALVCH16501 18-BIT UNIVERSAL BUS TRANSCEIVER V ± ± ± ± ...

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