MAX9122EUE Maxim Integrated, MAX9122EUE Datasheet - Page 7

• Manufacturer Part Number: MAX9122EUE
• Description: LVDS Interface IC Quad LVDS Line Driver
• Manufacturer: Maxim Integrated

received. Open or undriven terminated input conditions
can occur when a cable is disconnected or cut, or
when the LVDS driver outputs are high impedance. A
short condition can occur because of a cable failure.
The fail-safe input network (Figure 1) samples the input
common-mode voltage and compares it to V
(nominal). When the input is driven to levels specified in
the LVDS standards, the input to the common-mode
voltage is less than V
is not activated. If the inputs are open or if the inputs
are undriven and shorted or undriven and parallel ter-
minated, there is no input current. In this case, a pullup
resistor in the fail-safe circuit pulls both inputs above
V
the output high.
Bypass the V
ceramic 0.1µF and 0.001µF capacitors in parallel as
Integrated Termination and Flow-Through Pinout
Figure 1. Input with Fail-Safe Network
CC
- 0.3V, activating the fail-safe circuit and forcing
CC
IN_-
IN_+
Applications Information
pin with high-frequency surface-mount
_______________________________________________________________________________________
R
R
IN1
IN1
R
CC
IN2
Power-Supply Bypassing
V
CC
- 0.3V and the fail-safe circuit
V
CC
MAX9121
- 0.3V
Quad LVDS Line Receivers with
CC
- 0.3V
OUT_
IN_+
IN_-
close to the device as possible, with the smaller valued
capacitor closest to V
Input trace characteristics affect the performance of the
MAX9121/MAX9122. Use controlled-impedance PC
board traces to match the cable characteristic imped-
ance. The termination resistor is also matched to this
characteristic impedance.
Eliminate reflections and ensure that noise couples as
common mode by running the differential traces close
together. Reduce skew by matching the electrical
length of the traces. Excessive skew can result in a
degradation of magnetic field cancellation.
Each channel’s differential signals should be routed
close to each other to cancel their external magnetic
field. Maintain a constant distance between the differ-
ential traces to avoid discontinuities in differential
impedance. Avoid 90° turns and minimize the number
of vias to further prevent impedance discontinuities.
R
DIFF
R
R
IN1
IN1
R
IN2
V
CC
V
MAX9122
CC
- 0.3V
CC
.
Differential Traces
OUT_
7