MAX9157EGJ-T Maxim Integrated, MAX9157EGJ-T Datasheet - Page 11

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MAX9157EGJ-T

Manufacturer Part Number
MAX9157EGJ-T
Description
LVDS Interface IC Quad Bus LVDS Transceiver
Manufacturer
Maxim Integrated
Datasheet
Figure 4. Driver Propagation Delay and Transition Time
Waveforms
Figure 6. Driver High-Impedance Delay Waveform
Figure 7. Receiver Transition Time and Propagation Delay Test Circuit
RIN_+
RIN_-
DIN_
V
OD
20%
50%
t
PLHD
D0_+/RIN_+ WHEN DIN_ = V
DO_-/RIN_- WHEN DIN_ = V
DO_+/RIN_+ WHEN DIN_ = 0
DO_-/RIN_- WHEN DIN_ = 0
t
TLH
______________________________________________________________________________________
0 DIFFERENTIAL
80%
0
V
OD
= (V
DO_+/RIN_+
DE_
CC
CC
- V
DO _ -/RIN _ -
)
GENERATOR
*50Ω REQUIRED FOR PULSE GENERATOR TERMINATION.
80%
PULSE
50%
t
PHLD
t
THL
0
0
50Ω*
20%
Quad Bus LVDS Transceiver
0
V
V
V
t
t
PHZ
PLZ
OH
OL
CC
50%
DO_+/RIN_+
DO_-/RIN_-
50%
50%
50Ω*
Figure 5. Driver High-Impedance Delay Test Circuit
GENERATOR
RECEIVER ENABLED
1/4 MAX9157
GND
V
CC
50Ω
C
L
RO_
50%
1/4 MAX9157
t
t
PZH
PZL
DIN_
DE_
50%
50%
V
0
V
1.2V
1.2V
V
CC
OH
OL
C
C
L
L
R
R
L
L
/2
/2
DO_+/RIN_+
DO_-/RIN_-
+1.2V
11

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