MAX9123EUE+TG60 Maxim Integrated, MAX9123EUE+TG60 Datasheet - Page 6

• Manufacturer Part Number: MAX9123EUE+TG60
• Description: LVDS Interface IC Quad LVDS Line Driver with Flow-Through Pinout
• Manufacturer: Maxim Integrated

The LVDS interface standard is a signaling method
intended for point-to-point communication over a con-
trolled-impedance medium as defined by the
ANSI/TIA/EIA-644 and IEEE 1596.3 standards. The
LVDS standard uses a lower voltage swing than other
common communication standards, achieving higher
data rates with reduced power consumption while
reducing EMI emissions and system susceptibility to
noise.
The MAX9123 is an 800Mbps quad differential LVDS
driver that is designed for high-speed, point-to-point,
and low-power applications. This device accepts
LVTTL/LVCMOS input levels and translates them to
LVDS output signals.
The MAX9123 generates a 2.5mA to 4.0mA output cur-
rent using a current-steering configuration. This current-
steering approach induces less ground bounce and no
shoot-through current, enhancing noise margin and sys-
tem speed performance. The driver outputs are short-
circuit current limited, and enter a high-impedance state
when the device is not powered or is disabled.
The current-steering architecture of the MAX9123
requires a resistive load to terminate the signal and
complete the transmission loop. Because the device
switches current and not voltage, the actual output volt-
age swing is determined by the value of the termination
resistor at the input of an LVDS receiver. Logic states
are determined by the direction of current flow through
the termination resistor. With a typical 3.7mA output
current, the MAX9123 produces an output voltage of
370mV when driving a 100Ω load.
Quad LVDS Line Driver with
Flow-Through Pinout
6
10, 11, 14, 15
9, 12, 13, 16
_______________________________________________________________________________________
2, 3, 6, 7
PIN
1
4
5
8
OUT_+
NAME
OUT_-
GND
V
IN_
EN
EN
CC
Detailed Description
Driver Enable Input. The driver is disabled when EN is low. EN is internally pulled down. When EN =
high and EN = low or open, the outputs are active. For other combinations of EN and EN, the
outputs are disabled and are high impedance.
LVTTL/LVCMOS Driver Inputs
Power-Supply Input. Bypass V
Ground
Driver Enable Input. The transmitter is disabled when EN is high. EN is internally pulled down.
Inverting LVDS Driver Outputs
Noninverting LVDS Driver Outputs
CC
to GND with 0.1µF and 0.001µF ceramic capacitors.
Because the MAX9123 is a current-steering device, no
output voltage will be generated without a termination
resistor. The termination resistors should match the dif-
ferential impedance of the transmission line. Output
voltage levels depend upon the value of the termination
resistor. The MAX9123 is optimized for point-to-point
interface with 100Ω termination resistors at the receiver
inputs. Termination resistance values may range
between 90Ω and132Ω, depending on the characteris-
tic impedance of the transmission medium.
Table 1. Input/Output Function Table
Bypass V
ceramic 0.1µF and 0.001µF capacitors in parallel as
close to the device as possible, with the smaller valued
capacitor closest to V
Output trace characteristics affect the performance of
the MAX9123. Use controlled-impedance traces to
match trace impedance to the transmission medium.
All other combinations
EN
H
H
of ENABLE pins
FUNCTION
ENABLES
CC
L or open
L or open
with high-frequency, surface-mount
Applications Information
EN
CC
Power-Supply Bypassing
.
INPUTS
Don’t
care
IN_
H
L
Pin Description
Differential Traces
OUT_+
H
Z
L
Termination
OUTPUTS
OUT_ -
H
Z
L