MAX9180EXT-T Maxim Integrated, MAX9180EXT-T Datasheet - Page 6
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MAX9180EXT-T
Manufacturer Part Number
MAX9180EXT-T
Description
LVDS Interface IC
Manufacturer
Maxim Integrated
Type
LVDSr
Datasheet
1.MAX9180EXT-T.pdf
(9 pages)
Specifications of MAX9180EXT-T
Number Of Drivers
1
Number Of Receivers
1
Data Rate
400 Mbps
Operating Supply Voltage
3.3 V
Maximum Power Dissipation
245 mW
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Propagation Delay Time
2.8 ns
Supply Voltage - Max
3.6 V
Supply Voltage - Min
3 V
Bypass V
ic 0.01µF capacitor as close to the device as possible.
Input and output trace characteristics affect the perfor-
mance of the MAX9180. Use controlled-impedance dif-
ferential traces. Ensure that noise couples as common
mode by running the traces within a differential pair
close together.
Maintain the distance within a differential pair to avoid
discontinuities in differential impedance. Avoid 90°
turns and minimize the number of vias to further prevent
impedance discontinuities.
The LVDS standards define signal levels for intercon-
nect with a differential characteristic impedance and
termination of 100Ω. Interconnects with a characteristic
impedance and termination of 90Ω to 132Ω impedance
are allowed, but produce different signal levels (see the
Termination section).
Use cables and connectors that have matched differen-
tial impedance to minimize impedance discontinuities.
Avoid the use of unbalanced cables, such as ribbon or
coaxial cable. Balanced cables, such as twisted pair,
offer superior signal quality and tend to generate less
EMI due to canceling effects. Balanced cables tend to
pick up noise as common mode, which is rejected by
the LVDS receiver.
For point-to-point links, the termination resistor should
be located at the LVDS receiver input and match the
400Mbps, Low-Jitter, Low-Noise LVDS
Repeater in an SC70 Package
6
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CC
with a high-frequency surface-mount ceram-
Applications Information
Cables and Connectors
Differential Traces
Supply Bypassing
Termination
differential characteristic impedance of the transmis-
sion line.
For a multidrop bus driven at one end, terminate at the
other end of the bus with a resistor that matches the
loaded differential characteristic impedance of the bus.
For a multidrop bus driven from a point other than the
end, terminate each end of the bus with a resistor that
matches the loaded differential characteristic imped-
ance of the bus. When terminating at both ends, or for a
large number of drops, a BLVDS driver is needed to
drive the bus to LVDS signal levels. The MAX9180 is
not intended to drive double-terminated multidrop
buses to LVDS levels.
The differential output voltage level depends upon the
differential characteristic impedance of the interconnect
and the value of the termination resistance. The
MAX9180 is guaranteed to produce LVDS output levels
into 100Ω. With the typical 3.6mA output current, the
MAX9180 produces an output voltage of 360mV when
driving a 100Ω transmission line terminated with a
100Ω termination resistor (3.6mA x 100Ω = 360mV). For
typical output levels with different loads, see the
Differential Output Voltage vs. Load Resistor curve in
the Typical Operating Characteristics.
TRANSISTOR COUNT: 401
PROCESS: CMOS
Chip Information