MAX9967ALCCQ+D Maxim Integrated, MAX9967ALCCQ+D Datasheet - Page 23

• Manufacturer Part Number: MAX9967ALCCQ+D
• Description: Buffers & Line Drivers
• Manufacturer: Maxim Integrated

Specifications of MAX9967ALCCQ+D

• Rohs: yes

Each output provides a nominal 400mV
50Ω source termination.
An open-emitter configuration is also available (Figure 4).
Connect an external collector voltage to V
external pulldown resistors. These resistors are typically
50Ω to V
trace. Alternate configurations may be used provided that
the Absolute Maximum Ratings are not exceeded.
The active load consists of linearly programmable
source and sink current sources, a commutation buffer,
and a diode bridge (see Functional Diagram). Analog
reference inputs LDH_ and LDL_ program the sink and
source currents, respectively, within the 0 to 35mA
range. Analog reference input COM_ sets the commuta-
tion buffer output voltage. The source and sink naming
convention is referenced to the device under test.
Current out of the MAX9967 constitutes sink current and
current into the MAX9967 constitutes source current.
The programmed source (low) current loads the device
under test when V
sink (high) current loads the device under test when
V
The GS input allows a single level-setting DAC, such as
the MAX5631 or MAX5734, to program the MAX9967’s
active load, driver, comparator, and clamps. Although
Table 1. Driver Logic
Table 2. Slew-Rate Logic
DATA_
DUT
CONNECTIONS
EXTERNAL
1
0
X
X
X
SC1
0
0
1
1
_ < V
CCO
COM
RCV_
0
0
1
1
X
_ - 2V at the receiving end of the output
_.
SC0
0
1
0
1
______________________________________________________________________________________
TMSEL
DUT
REGISTER
X
X
1
0
X
INTERNAL
CONTROL
_ > V
LLEAK
DRIVER SLEW RATE (%)
COM
0
0
0
0
1
Driver/Comparator with 35mA Load
_. The programmed
Drive to DHV_
Drive to DLV_
Drive to DTV_
(term mode)
High-impedance
(high-z) mode
Low-leakage mode
DRIVER OUTPUT
100
75
50
25
Dual, Low-Power, 500Mbps ATE
Active Load
P-P
CCO
swing and
_ and add
all of the DAC levels are typically offset by V
operation of the MAX9967’s ground-sense input nulli-
fies this offset with respect to the active-load currents.
Connect GS to the ground reference used by the DAC.
(V
(V
The high-speed differential input LDEN_ and 3 bits of
the control word (LDCAL, LDDIS, and LLEAK) control
the load (Table 4). When the load is enabled, the inter-
nal source and sink current sources connect to the
diode bridge. When the load is disabled, the internal
current sources shunt to ground and the top and bot-
tom of the bridge float (see the Functional Diagram).
LLEAK places the load in low-leakage mode. LLEAK
overrides LDEN_, LDDIS, and LDCAL. See the Low-
Leakage Mode, LLEAK section for more detailed infor-
mation.
In some tester configurations, the load enable is driven
with the complement of the driver high-impedance signal
(RCV_), so disabling the driver enables the load and vice
versa. The LDDIS and LDCAL signals disable and enable
the load independently of the state of LDEN_. This allows
the load and driver to be simultaneously enabled and dis-
abled for diagnostic purposes (Table 4).
Asserting LLEAK through the serial port or with RST
places the MAX9967 into a very low-leakage state (see
the Electrical Characteristics). The comparators func-
tion at full speed, but the driver, clamps, and active
load are disabled. This mode is convenient for making
IDDQ and PMU measurements without the need for an
output disconnect relay. LLEAK is programmed inde-
pendently for each channel.
When DUT_ is driven with a high-speed signal while
LLEAK is asserted, the leakage current momentarily
increases beyond the limits specified for normal opera-
tion. The low-leakage recovery specification in the
Electrical Characteristics table indicates device behav-
ior under this condition.
Table 3. Comparator Logic
DUT_ > CHV_
LDH
LDL
_ - V
_ - V
0
0
1
1
GS
GS
) sets the sink current by -10mA/V.
) sets the source current by +10mA/V.
DUT_ > CLV_
Low-Leakage Mode, LLEAK
0
1
0
1
LDDIS and LDCAL
CH_
0
0
1
1
GS
CL_
0
1
0
1
, the
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