74LVC377D-T NXP Semiconductors, 74LVC377D-T Datasheet - Page 7

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74LVC377D-T

Manufacturer Part Number
74LVC377D-T
Description
Flip Flops 3.3V OCTAL POS D-TYPE ENABL
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC377D-T

Product Category
Flip Flops
Rohs
yes
Number Of Circuits
1
Logic Family
LVC
Logic Type
D-Type Edge Triggered Flip-Flop
Polarity
Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
6 ns at 3.3 V
High Level Output Current
- 24 mA
Supply Voltage - Max
3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-163
Minimum Operating Temperature
- 40 C
Number Of Input Lines
8
Number Of Output Lines
8
Factory Pack Quantity
2000
Supply Voltage - Min
1.2 V
Part # Aliases
74LVC377D,118
NXP Semiconductors
11. Waveforms
Table 8.
74LVC377_6
Product data sheet
Supply voltage
V
1.2 V
1.65 V to 1.95V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
Fig 4.
Fig 5.
CC
Measurement points are given in
Logic levels: V
Propagation delay clock (CP) to output (Qn), pulse width clock (CP), and maximum frequency
Measurement points are given in
The shaded areas indicate when the input is permitted to change for predictable output performance.
Data set-up and hold times of data input (Dn) and enable input (E) and pulse width of enable input (E)
Measurement points
OL
and V
CP input
Dn input
E input
Qn output
CP input
OH
are typical output voltage levels that occur with the output load.
GND
GND
GND
GND
V
V
V
V
V
CC
CC
CC
OH
OL
V
Table
Table
I
Input
V
0.5  V
0.5  V
0.5  V
1.5 V
1.5 V
All information provided in this document is subject to legal disclaimers.
M
8.
8.
Rev. 06 — 20 November 2012
CC
CC
CC
V
V
V
M
M
M
Octal D-type flip-flop with data enable; positive-edge trigger
t
t
su
t
PHL
su
t
W
1/f
V
t
V
h
M
M
max
t
W
t
PLH
t
su
Output
V
0.5  V
0.5  V
0.5  V
1.5 V
1.5 V
M
mna894
t
h
mna921
CC
CC
CC
74LVC377
© NXP B.V. 2012. All rights reserved.
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