74ALVCH16374DGG NXP Semiconductors, 74ALVCH16374DGG Datasheet - Page 5
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
74ALVCH16374DGG
Manufacturer Part Number
74ALVCH16374DGG
Description
Flip Flops IC 16BIT EDGE TRIG D FF
Manufacturer
NXP Semiconductors
Datasheet
1.74ALVCH16374DGG.pdf
(17 pages)
Specifications of 74ALVCH16374DGG
Number Of Circuits
2
Logic Family
ALVC
Logic Type
CMOS
Polarity
Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
2.4 ns
High Level Output Current
- 24 mA
Supply Voltage - Max
3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Number Of Input Lines
8
Number Of Output Lines
8
Factory Pack Quantity
2000
Supply Voltage - Min
1.2 V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
74ALVCH16374DGG
Manufacturer:
SMD
Quantity:
61
Part Number:
74ALVCH16374DGG
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
NXP Semiconductors
Table 2.
6. Functional description
Table 3.
[1]
74ALVCH16374
Product data sheet
Symbol
1OE, 2OE
1Q0 to 1Q7
2Q0 to 2Q7
GND
V
1D0 to 1D7
2D0 to 2D7
1CP, 2CP
Inputs
nOE
L
L
H
H
CC
H = HIGH voltage level;
L = LOW voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition;
I = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition;
= LOW-to-HIGH clock transition;
Z = high-impedance OFF-state.
Pin description
Function table
nCP
5.2 Pin description
6.1 Function table
Pin
1, 24
2, 3, 5, 6, 8, 9, 11, 12
13, 14, 16, 17, 19, 20, 22, 23
4, 10, 15, 21, 28, 34, 39, 45
7, 18, 31, 42
47, 46, 44, 43, 41, 40, 38, 37
36, 35, 33, 32, 30, 29, 27, 26
48, 25
[1]
Dn
l
h
l
h
All information provided in this document is subject to legal disclaimers.
Internal
flip-flops
L
H
L
H
Rev. 5 — 9 July 2012
2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
Description
output enable input (active LOW)
3-state flip-flop outputs
3-state flip-flop outputs
ground (0 V)
positive supply voltage
data inputs
data inputs
clock input
Outputs Q0 to Q7
L
H
Z
Z
74ALVCH16374
Operating mode
load and read register
load register and disable outputs
© NXP B.V. 2012. All rights reserved.
5 of 17