74ACTQ373QSC_Q Fairchild Semiconductor, 74ACTQ373QSC_Q Datasheet - Page 2

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74ACTQ373QSC_Q

Manufacturer Part Number
74ACTQ373QSC_Q
Description
Latches Octal Trans Latch
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of 74ACTQ373QSC_Q

Number Of Circuits
8
Logic Type
Transparent Latch
Logic Family
74ACT
Polarity
Non-Inverting
Number Of Output Lines
3
High Level Output Current
- 24 mA
Propagation Delay Time
7.5 ns at 5 V
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Package / Case
QSOP-20
Mounting Style
SMD/SMT
Number Of Input Lines
8
©1989 Fairchild Semiconductor Corporation
74ACQ373, 74ACTQ373 Rev. 1.3
Logic Symbol
IEEE/IEC
2
Functional Description
The ACQ/ACTQ373 contains eight D-type latches with
3-STATE standard outputs. When the Latch Enable (LE)
input is HIGH, data on the D
In this condition the latches are transparent, i.e., a latch
output will change state each time its D input changes.
When LE is LOW, the latches store the information that
was present on the D inputs at setup time preceding the
HIGH-to-LOW transition of LE. The 3-STATE standard
outputs are controlled by the Output Enable (OE) input.
When OE is LOW, the standard outputs are in the
2-state mode. When OE is HIGH, the standard outputs
are in the high impedance mode but this does not inter-
fere with entering new data into the latches.
Truth Table
H = HIGH Voltage Level
L = LOW Voltage Level
Z = High Impedance
X = Immaterial
O
Latch Enable
0
= Previous O
LE
X
H
H
L
Inputs
0
OE
before HIGH-to-LOW transition of
H
L
L
L
n
inputs enters the latches.
D
X
H
X
L
n
www.fairchildsemi.com
Outputs
O
O
H
Z
L
n
0

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