74LVC373AD-T NXP Semiconductors, 74LVC373AD-T Datasheet - Page 8
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
74LVC373AD-T
Manufacturer Part Number
74LVC373AD-T
Description
Latches 3.3V OCTAL D TRANS LATCH 3-S
Manufacturer
NXP Semiconductors
Datasheet
1.74LVC373ADB-T.pdf
(19 pages)
Specifications of 74LVC373AD-T
Product Category
Latches
Rohs
yes
Number Of Circuits
8
Logic Type
TTL
Logic Family
LVC
Polarity
Non-Inverting
Number Of Output Lines
8
High Level Output Current
- 24 mA
Propagation Delay Time
3 ns at 3.3 V
Supply Voltage - Max
3.6 V
Supply Voltage - Min
1.2 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Package / Case
SO-20
Mounting Style
SMD/SMT
Number Of Input Lines
8
Factory Pack Quantity
2000
Part # Aliases
74LVC373AD,118
NXP Semiconductors
Table 7.
Voltages are referenced to GND (ground = 0 V). For test circuit see
[1]
[2]
[3]
[4]
74LVC373A
Product data sheet
Symbol Parameter
t
t
t
t
t
C
dis
W
su
h
sk(0)
PD
Typical values are measured at T
t
t
t
Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
C
P
f
C
V
N = number of inputs switching
(C
pd
en
dis
i
D
CC
PD
= input frequency in MHz; f
L
is the same as t
is the same as t
= output load capacitance in pF
= C
is the same as t
L
is used to determine the dynamic power dissipation (P
= supply voltage in Volts
V
disable time
pulse width
set-up time
hold time
output skew time
power dissipation
capacitance
PD
Dynamic characteristics
CC
V
2
f
CC
o
2
) = sum of the outputs
f
PLH
PZL
PLZ
i
N + (C
and t
and t
and t
PZH
PHL
PHZ
o
Conditions
OE to Qn; see
LE HIGH; see
Dn to LE; see
Dn to LE; see
V
per latch; V
= output frequency in MHz
L
.
.
.
CC
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
amb
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
= 3.0 V to 3.6 V
CC
= 25 C and V
= 1.2 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
2
…continued
f
Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state
o
I
All information provided in this document is subject to legal disclaimers.
) where:
= GND to V
Figure 11
Figure 11
Figure 9
Figure 10
Rev. 3 — 22 November 2012
CC
= 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively.
CC
D
in W).
[2]
[3]
[4]
Figure
Min
2.3
1.0
1.5
1.5
5.0
4.0
3.0
3.0
4.0
3.0
2.0
2.0
3.0
2.0
1.5
1.5
-
-
-
-
-
40 C to +85 C
12.
Typ
16.6
19.2
21.6
8.0
4.3
2.4
3.2
3.0
1.5
0.0
0.3
-
-
-
-
-
-
-
-
-
-
[1]
Max
10.3
5.8
7.1
6.1
1.0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
40 C to +125 C Unit
74LVC373A
Min
2.3
1.0
1.5
1.5
5.0
4.0
3.0
3.0
4.0
3.0
2.0
2.0
3.0
2.0
1.5
1.5
-
-
© NXP B.V. 2012. All rights reserved.
Max
11.9
6.8
9.0
8.0
1.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
pF
pF
8 of 19