74LVC1G14GW-R NXP Semiconductors, 74LVC1G14GW-R Datasheet - Page 2

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74LVC1G14GW-R

Manufacturer Part Number
74LVC1G14GW-R
Description
Inverters SINGLE SCHMTT TRIGG INVERTER
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC1G14GW-R

Product Category
Inverters
Rohs
yes
Number Of Circuits
1
Logic Family
LVC
Logic Type
CMOS
High Level Output Current
- 32 mA
Low Level Output Current
32 mA
Propagation Delay Time
5 ns
Supply Voltage - Max
5.5 V
Supply Voltage - Min
1.65 V
Maximum Operating Temperature
+ 125 C
Package / Case
SOT-353
Mounting Style
SMD/SMT
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V, 5 V
Factory Pack Quantity
10000
Part # Aliases
74LVC1G14GW,165
NXP Semiconductors
4. Ordering information
Table 1.
5. Marking
Table 2.
[1]
6. Functional diagram
74LVC1G14
Product data sheet
Type number
74LVC1G14GW
74LVC1G14GV
74LVC1G14GM
Type number
74LVC1G14GW
74LVC1G14GV
74LVC1G14GM
74LVC1G14GF
74LVC1G14GN
74LVC1G14GS
74LVC1G14GX
74LVC1G14GF
74LVC1G14GN
74LVC1G14GS
74LVC1G14GX
Fig 1.
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
2
Logic symbol
Ordering information
Marking
A
Package
Temperature range Name
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
mna023
Y
4
All information provided in this document is subject to legal disclaimers.
Fig 2.
TSSOP5
SC-74A
XSON6
XSON6
XSON6
XSON6
X2SON5
Rev. 12 — 6 August 2012
2
IEC logic symbol
Description
plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
plastic surface-mounted package; 5 leads
plastic extremely thin small outline package; no leads;
6 terminals; body 1  1.45  0.5 mm
plastic extremely thin small outline package; no leads;
6 terminals; body 1  1  0.5 mm
extremely thin small outline package; no leads;
6 terminals; body 0.9  1.0  0.35 mm
extremely thin small outline package; no leads;
6 terminals; body 1.0  1.0  0.35 mm
X2SON5: plastic thermal enhanced extremely thin
small outline package; no leads; 5 terminals;
body 0.8  0.8  0.35 mm
Marking code
VF
V14
VF
VF
VF
VF
VF
mna024
4
[1]
Fig 3.
A
Single Schmitt-trigger inverter
Logic diagram
74LVC1G14
© NXP B.V. 2012. All rights reserved.
Version
SOT353-1
SOT753
SOT886
SOT891
SOT1115
SOT1202
SOT1226
mna025
2 of 20
Y

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