ISL28417FBBZ-T7A Intersil, ISL28417FBBZ-T7A Datasheet - Page 19

• Manufacturer Part Number: ISL28417FBBZ-T7A
• Description: Operational Amplifiers - Op Amps ISL28417FBBZ QUAD 40 PREC LW PWR OPERTNL
• Manufacturer: Intersil

Specifications of ISL28417FBBZ-T7A

• Product Category: Operational Amplifiers - Op Amps
• Rohs: yes
• Number Of Channels: 4
• Common Mode Rejection Ratio (min): 120 dB
• Input Offset Voltage: 110 uV
• Input Bias Current (max): 1.5 nA
• Operating Supply Voltage: 4.5 V to 40 V, +/- 2.25 V to +/- 20 V
• Mounting Style: SMD/SMT
• Package / Case: SOIC-14
• Slew Rate: 0.5 V/us
• Shutdown: No
• Output Current: 43 mA
• Maximum Operating Temperature: + 125 C
• Gain Bandwidth Product: 1.5 MHz
• Minimum Dual Supply Voltage: +/- 2.25 V
• Minimum Operating Temperature: - 40 C
• Supply Current: 0.53 mA

Typical Performance Curves
Applications Information
Functional Description
The ISL28117, ISL28217 and ISL28417 are single, dual and
quad, low noise precision op amps. Both devices are fabricated
in a new precision 40V complementary bipolar DI process. A
super-beta NPN input stage with input bias current cancellation
provides low input bias current (180pA typical), low input offset
voltage (13µV typical), low input noise voltage (8nV/√Hz), and
low 1/f noise corner frequency (~8Hz). These amplifiers also
feature high open loop gain (18kV/mV) for excellent CMRR
(145dB) and THD+N performance (0.0005% @ 3.5V
into 2kΩ). A complimentary bipolar output stage enables high
capacitive load drive without external compensation.
Operating Voltage Range
The devices are designed to operate over the 4.5V (±2.25V) to
40V (±20V) range and are fully characterized at 10V (±5V) and
30V (±15V). The Power Supply Rejection Ratio typically exceeds
140dB over the full operating voltage range and 120dB
minimum over the -40°C to +125°C temperature range. The
worst case common mode input voltage range over temperature
is 2V to each rail. With ±15V supplies, CMRR performance is
typically >130dB over-temperature. The minimum CMRR
performance over the -40°C to +125°C temperature range is
>120dB for power supply voltages from ±5V (10V) to ±15V (30V).
Input Performance
The super-beta NPN input pair provides excellent frequency
response while maintaining high input precision. High NPN beta
(>1000) reduces input bias current while maintaining good
frequency response, low input bias current and low noise. Input
bias cancellation circuits provide additional bias current
reduction to <1nA, and excellent temperature stabilization.
Figures 11 through 18 show the high degree of bias current
stability at ±5V and ±15V supplies that is maintained across the
-40°C to +125°C temperature range. The low bias current TC
19
ISL28117, ISL28217, ISL28417
100M
100k
10M
10k
100
1M
1k
10
1
0.01
FIGURE 53. COMMON MODE INPUT IMPEDANCE
0.1
RMS
1
, 1kHz
V
S
= ±15V, V
10
FREQUENCY (Hz)
100
CM
also produces very low input offset current TC, which reduces DC
input offset errors in precision, high impedance amplifiers.
The +25°C maximum input offset voltage (V
50µV and 100µV for the “C” grade. Input offset voltage temperature
coefficients (V
±0.9µV/°C for the “C” grade. Figures 3 through 6 show the typical
gaussian-like distribution over the ±5V to ±15V supply range and over
the full temperature range. The V
(Figures 7 through 10) maintaining constant TC across the entire
temperature range.
Input ESD Diode Protection
The input terminals (IN+ and IN-) have internal ESD protection
diodes to the positive and negative supply rails, series connected
500Ω current limiting resistors and an anti-parallel diode pair
across the inputs (Figure 54).
The series resistors limit the high feed-through currents that can
occur in pulse applications when the input dV/dT exceeds the
0.5V/µs slew rate of the amplifier. Without the series resistors, the
input can forward-bias the anti-parallel diodes causing current to
flow to the output resulting in severe distortion and possible diode
failure. Figure 48 provides an example of distortion free large signal
response using a 4V
The series resistors enable the input differential voltage to be equal
to the maximum power supply voltage (40V) without damage.
= 0V, R
FIGURE 54. INPUT ESD DIODE CURRENT LIMITING- UNITY GAIN
1k
V
IN
L
10k
= Open, unless otherwise specified.
OS
100k
TC) are a maximum of ±0.6µV/°C for the “B” and
P-P
1M
+
-
V-
input pulse with an input rise time of <1ns.
V+
500Ω
500Ω
10M
OS
temperature behavior is smooth
(Continued)
OS
) for the “B” grade is
R
L
November 30, 2012
V
OUT
FN6632.10