MAX9761ETI-T Maxim Integrated, MAX9761ETI-T Datasheet - Page 17
![no-image](/images/no-image-200.jpg)
MAX9761ETI-T
Manufacturer Part Number
MAX9761ETI-T
Description
Audio Amplifiers
Manufacturer
Maxim Integrated
Datasheet
1.MAX9763ETI.pdf
(31 pages)
Specifications of MAX9761ETI-T
Output Type
2-Channel Stereo
Output Power
3 W x 2 at 3 Ohms, 0.2 W x 2 at 16 Ohms
Thd Plus Noise
0.01 % at 4 Ohms at 2 W, 0.002 % at 16 Ohms at 125 mW
Operating Supply Voltage
5 V
Maximum Power Dissipation
1667 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TQFN EP
Audio Load Resistance
32 Ohms
Input Signal Type
Single
Minimum Operating Temperature
- 40 C
Output Signal Type
Differential, Single
Supply Type
Single
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
The control register (03hex) is a read/write register that
determines the device configuration. Bit 1 (IN1/IN2)
controls the input multiplexer, a logic high selects input
1, a logic low selects input 2. Bit 2 (HPS_D) controls the
headphone sensing. A logic low configures the device
Figure 7. Write/Read Data Format Example
Table 2. I
Table 3. MUTE Register Format
*Default state.
ADD CONNECTION
BIT
7
6
5
4
3
2
1
0
REGISTER
ADDRESS
GND
SDA
V
SCL
MUTER
MUTEL
NAME
DD
2
X
X
X
X
X
X
C Slave Addresses
______________________________________________________________________________________
S
S
Stereo 3W Audio Power Amplifiers with
Don’t Care
Don’t Care
Don’t Care
Don’t Care
Don’t Care
Don’t Care
VALUE
I
I
2
2
C SLAVE ADDRESS.
SELECTS DEVICE.
C SLAVE ADDRESS.
SELECTS DEVICE.
ADDRESS
ADDRESS
0*
0*
1
1
7 BITS
7 BITS
0000 0001
I
2
WR
WR
C ADDRESS
100 1000
100 1001
100 1010
100 1011
Unmute right channel
Unmute left channel
Mute right channel
Mute left channel
Control Register
ACK
ACK
DESCRIPTION
Headphone Drive and Input Mux
SELECTS REGISTER TO BE
—
—
—
—
—
—
REGISTER ADDRESS.
REGISTER ADDRESS.
COMMAND
COMMAND
SELECTS REGISTER
8 BITS
8 BITS
WRITTEN TO.
TO BE READ.
ACK
ACK
in automatic headphone detection mode. A logic high
disables the HPS input. Bit 3 (GAINA/B) controls the
gain-select multiplexer. A logic low selects GAINA. A
logic high selects GAINB. GAINA/B is ignored when
HPS_D = 0. Bit 4 (SPKR/HP) selects the amplifier oper-
ating mode when HPS_D = 1. A logic high selects
speaker mode and a logic low selects headphone
mode.
S
Table 4. SHDN Register Format
*Default state.
8 BITS
DATA
REGISTER DATA
BIT
I
2
C SLAVE ADDRESS.
SELECTS DEVICE.
7
6
5
4
3
2
1
0
ADDRESS
7 BITS
REGISTER
ADDRESS
ACK
RESET
RESET
RESET
RESET
RESET
RESET
NAME
SHDN
P
WR
1
X
ACK
Don’t Care
SELECTED REGISTER
VALUE
8 BITS
DATA
DATA FROM
0*
0*
0*
0*
0*
0*
0*
1
1
1
1
1
1
1
0000 0010
P
1
Normal operation
DESCRIPTION
Reset device
Reset device
Reset device
Reset device
Reset device
Reset device
Shutdown
—
—
—
—
—
—
—
17