MAX7312AWG-T Maxim Integrated, MAX7312AWG-T Datasheet - Page 3

• Manufacturer Part Number: MAX7312AWG-T
• Description: Interface - I/O Expanders 16-Bit I/O Port Expander
• Manufacturer: Maxim Integrated
• Series: MAX7312r

Specifications of MAX7312AWG-T

• Maximum Operating Frequency: 400 KHz
• Operating Supply Voltage: 2 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-24 Wide
• Output Current: 43 mA
• Power Dissipation: 640 mW

DC ELECTRICAL CHARACTERISTICS (continued)
(V + = 2V to 5.5V, T
AC ELECTRICAL CHARACTERISTICS
(V + = 2V to 5.5V, T
Note 1: All parameters are 100% production tested at T
Note 2: Minimum SCL clock frequency is limited by the MAX7312 bus timeout feature, which resets the serial bus interface if either
Note 3: A master device must internally provide a hold time of at least 300ns for the SDA signal (referred to the V
Note 4: C
Note 5: The maximum t
Note 6: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
Leakage Current
Input Capacitance
INT
Low-Level Output Current
SCL Clock Frequency
Bus Timeout
Bus Free Time Between STOP
and START Conditions
Hold Time (Repeated) START
Condition
Repeated START Condition
Setup Time
STOP Condition Setup Time
Data Hold Time
Data Setup Time
SCL Low Period
SCL High Period
SDA Fall Time
Pulse Width of Spike Suppressed
PORT TIMING
Output Data Valid
Input Data Setup Time
Input Data Hold Time
INTERRUPT TIMING
Interrupt Valid
Interrupt Reset
SDA or SCL is held low for a minimum of 25ms. Disable bus timeout feature for DC operation.
signal) in order to bridge the undefined region SCL’s falling edge.
specified at 250ns. This allows series protection resistors to be connected between the SDA and SCL pins and the
SDA/SCL bus lines without exceeding the maximum specified t
B
PARAMETER
PARAMETER
= total capacitance of one bus line in pF.
with Interrupt and Hot-Insertion Protection
2-Wire-Interfaced 16-Bit I/O Port Expander
A
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V + = 3.3V, T
= -40°C to +125°C, unless otherwise noted.) (Note 1)
_______________________________________________________________________________________
F
for the SDA and SCL bus lines is specified at 300ns. The maximum fall time for the SDA output stage t
SYM B O L
SYM B O L
t
TIMEOUT
t
t
t
t
t
HD,DAT
HD,STA
SU,STO
SU,DAT
SU,STA
t
t
t
f
HIGH
LOW
I
BUF
SCL
t
t
t
t
OL
t
SP
PV
IR
IV
F
V
(Note 2)
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2 (Note 3)
Figure 2
Figure 2
Figure 2
Figure 2 (Notes 4, 5)
(Note 6)
Figure 7
Figure 9
Figure 9
OL
= 0.4V
A
= +25°C. Specifications over temperature are guaranteed by design.
CONDITIONS
CONDITIONS
F
.
V+ < 3.3V
V+ ≥ 3.3V
MIN
MIN
100
1.3
0.6
0.6
0.6
1.3
0.7
29
27
A
-1
0
6
= +25°C.) (Note 1)
TYP
TYP
50
4
MAX
MAX
30.5
400
500
250
0.9
61
+1
3
2
IL
of the SCL
UNITS
UNITS
kHz
mA
ms
µA
pF
µs
µs
µs
µs
µs
ns
µs
µs
ns
ns
µs
µs
µs
µs
µs
F
is
3