MAX7313ATG-T Maxim Integrated, MAX7313ATG-T Datasheet - Page 15

• Manufacturer Part Number: MAX7313ATG-T
• Description: Interface - I/O Expanders 16-Bit I/O Port Expander
• Manufacturer: Maxim Integrated
• Series: MAX7313r

Specifications of MAX7313ATG-T

• Maximum Operating Frequency: 400 KHz
• Operating Supply Voltage: 2 V to 3.6 V
• Operating Temperature Range: - 40 C to + 125 C
• Mounting Style: SMD/SMT
• Package / Case: TQFN-24 EP
• Output Current: 50 mA
• Power Dissipation: 761 mW

X = Don’t care.
Table 4. Configuration Register (continued)
output is controlled by the O0 and O1 bits
INT/O16 output is high impedance during
INT/O16 output is high impedance during
Disable global intensity control—intensity
is set by registers 0x10–0x17 for ports P0
through P15 when configured as outputs,
INT/O16 outp ut i s l ow d ur i ng b l i nk p hase 0
INT/O16 outp ut i s l ow d ur i ng b l i nk p hase 1
INT/O16 when INT/O16 pin is configured
Enable global intensity control—intensity
INT/O16 output is high impedance (blink
—data change is detected, and INT/O16
output is low when interrupt enable (I bit)
Control, Interrupt, and Hot-Insertion Protection
Disable data change interrupt—INT/O16
INT/O16 output is low (blink is disabled)
Enable data change interrupt—INT/O16
Read-back data change interrupt status
Read-back data change interrupt status
for all ports configured as outputs is set
output is controlled by port input data
INT/O16 output is high when interrupt
—data change is not detected, and
and by D3–D0 of register 0x0E for
Read back device configuration
by D3–D0 of register 0x0E
Write device configuration
CONFIGURATION
enable (I bit) is set
as an output port
blink phase 0
blink phase 1
is disabled)
REGISTER
change
is set
______________________________________________________________________________________
16-Port I/O Expander with LED Intensity
R/W
—
—
—
—
—
—
—
—
—
—
0
1
1
1
ADDRESS
CODE
(HEX)
0x0F
INT
D7
X
X
X
X
X
X
X
X
X
X
0
1
D6
O
X
X
X
X
X
X
X
X
X
X
X
0
0
O1
D5
X
X
X
X
X
X
X
X
X
X
0
1
REGISTER DATA
O0
D4
X
X
X
X
0
1
0
1
X
X
X
X
D3
X
X
0
1
0
0
0
0
0
0
X
X
I
D2
G
0
1
X
X
X
X
X
X
X
X
X
X
D1
B
X
X
X
X
X
X
X
X
X
X
X
X
D0
E
X
X
X
X
0
0
1
1
1
1
X
X
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