74LVCH16374APVG IDT, 74LVCH16374APVG Datasheet
74LVCH16374APVG
Specifications of 74LVCH16374APVG
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74LVCH16374APVG Summary of contents
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... SEVEN OTHER CHANNELS The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE © 2006 Integrated Device Technology, Inc. 3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP- FLOP WITH 3-STATE OUTPUTS, 5V TOLERANT I/O AND BUS-HOLD DESCRIPTION The LVCH16374A 16-bit edge-triggered D-type register is built using advanced dual metal CMOS technology ...
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... IDT74LVCH16374A 3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP PIN CONFIGURATION GND GND GND ...
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... IDT74LVCH16374A 3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition –40°C to +85°C A Symbol Parameter V Input HIGH Voltage Level IH V Input LOW Voltage Level IL I Input Leakage Current High Impedance Output Current ...
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... IDT74LVCH16374A 3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP OUTPUT DRIVE CHARACTERISTICS Symbol Parameter V Output HIGH Voltage OH V Output LOW Voltage OL NOTE and V must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate – 40° 85°C. ...
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... HIGH Enable and Disable Times DATA INPUT TIMING INPUT t REM CONTROL CONTROL Set-up, Hold, and Release Times LOW-HIGH-LOW PULSE t W HIGH-LOW-HIGH PULSE Pulse Width LVC Link PLZ V ...
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... H 74 for SALES: 800-345-7015 or 408-284-8200 fax: 408-284-2775 www.idt.com 6 INDUSTRIAL TEMPERATURE RANGE Shrink Small Outline Package SSOP - Green Thin Shrink Small Outline Package TSSOP - Green 16-Bit Edge-Triggered D-Type Flip-Flop with 3-State Outputs Double-Density, ±24mA Bus-hold -40°C to +85°C for Tech Support: logichelp@idt.com ...