FT313HL-R FTDI, FT313HL-R Datasheet - Page 27

• Manufacturer Part Number: FT313HL-R
• Description: USB Interface IC USB High Speed USB Host Controller IC
• Manufacturer: FTDI

Specifications of FT313HL-R

• Rohs: yes
• Product: USB 2.0
• Data Rate: 480 Mbps
• Interface Type: USB
• Operating Supply Voltage: 1.62 V to 3.63 V
• Operating Supply Current: 35 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-64
• Minimum Operating Temperature: - 40 C

5.2.10
The port status and control register is in the power well. It is only reset by hardware when the power is
initially applied or in response to a host controller reset. The initial conditions of a port are:
The software must not attempt to change the state of the port until the power is stable on the port. The
host is required to have power stable to the port within 20 milliseconds of the zero to one transition.
When a peripheral device is attached, the port state transitions to the connected state and system
software will process this as with any status change notification.
Bit
[31:17]
16
[15:12]
[11:10]
9
8
7


No peripheral connected
Port disable
Name
Reserved
TST_FORCEEN
Reserved
LINE_STS
Reserved
PO_RESET
PO_SUSP
POSTSC register (address = 30h)
Copyright © 2012 Future Technology Devices International Limited
Type
RO
R/W
RO
RO
RO
R/W
R/W
Default value
15’h0
1’b0
4’b0
2’b00
1’b0
1’b0
1’b0
FT313H USB2.0 HS Host Controller Datasheet Version 1.1
Description
-
Test Force Enable
When this signal is written as ‘1,’ the
downstream facing port will be enabled in the
high-speed mode. Then the Run/Stop bit must
be transitioned to one in order to enable the
transmission of the SOFs out of the port under
test. This enables testing of the disconnect
detection.
-
Line Status
These bits reflect the current logical levels of the
D+ and D- signal lines.
Bits[11:10]
00b
10b
01b
11b
-
Port Reset
1 = Port is in the reset state.
0 = Port is not in the reset state.
When the software writes a ‘1’ to this bit, the
bus reset sequence as defined in the USB
specification will start.
Software writes a ‘0’ to this bit to terminate the
bus reset sequence. Software must keep this bit
at a ‘1’ long enough to ensure the reset
sequence.
Note: Reset signal which shall be followed by the
USB2.0 chapter 7.1.7.5 Reset Signal
requirement. If detected HS device, the software
shall wait more than 200us for port reset
clearing. Before setting this bit, RUN/STOP bit
should be set to ‘0.’
Port Suspend
1 = Port is in the suspend state
0 = Port is not in the suspend state.
USB state
SE0
J-state
K-state
Undefined
Document No.: FT_000589
Clearance No.: FTDI# 318
27