MC100ELT21DR2G ON Semiconductor, MC100ELT21DR2G Datasheet - Page 2

• Manufacturer Part Number: MC100ELT21DR2G
• Description: IC XLATOR PECL-TTL DIFF 8-SOIC
• Manufacturer: ON Semiconductor
• Series: 100ELTr

Specifications of MC100ELT21DR2G

• Logic Function: Translator
• Number Of Bits: 1
• Input Type: PECL
• Output Type: TTL
• Number Of Channels: 1
• Number Of Outputs/channel: 1
• Differential - Input:output: Yes/No
• Propagation Delay (max): 5.5ns
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Supply Voltage: 4.75 V ~ 5.25 V
• Logic Family: ECL
• Logical Function: Translator
• Technology: ECL
• High Level Output Current: -3mA
• Low Level Output Current: 24mA
• Translation: PECL to TTL
• Operating Supply Voltage (typ): 5V
• Package Type: SOIC N
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Abs. Propagation Delay Time: 5.5ns
• Mounting: Surface Mount
• Pin Count: 8
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Rate: -
• Lead Free Status / Rohs Status: Compliant

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
2. JEDEC standard multilayer board − 2S2P (2 signal, 2 power)
Table 3. MAXIMUM RATINGS
Symbol
V
V
I
TA
T
q
q
q
q
T
q
BB
stg
JA
JC
JA
JA
sol
JC
CC
IN
Figure 1. 8−Lead Pinout and Logic Diagram
V
NC
D0
D0
BB
PECL Power Supply
PECL Input Voltage
V
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Ambient)
Wave Solder
Thermal Resistance (Junction−to−Case)
BB
Sink/Source
1
2
3
4
Table 2. ATTRIBUTES
1. For additional information, see Application Note AND8003/D.
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
PECL
(Top View)
Parameter
TTL
Characteristics
8
7
6
5
Pb−Free
V
Q0
NC
GND
CC
Pb
http://onsemi.com
Oxygen Index: 28 to 34
GND = 0 V
GND = 0 V
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
0 lfpm
500 lfpm
<2 to 3 sec @ 248°C
<2 to 3 sec @ 260°C
(Note 2)
Human Body Model
Condition 1
2
TSSOP−8
Table 1. PIN DESCRIPTION
Q0
D0, DO
V
V
GND
NC
EP
SOIC−8
BB
CC
DFN8
Pin
V
SOIC−8
SOIC−8
SOIC−8
TSSOP−8
TSSOP−8
DFN8
DFN8
DFN8
I
 V
Condition 2
Pb Pkg
Level 1
Level 1
Level 1
UL 94 V−0 @ 0.125 in
CC
81 Devices
TTL Outputs
PECL Differential Outputs
Reference Voltage Output
Positive Supply
Ground
No Connect
(DFN8 only) Thermal exposed pad must
be connected to a sufficient thermal con-
duit. Electrically connect to the most neg-
ative supply (GND) or leave unconnec-
ted, floating open.
> 2 kV
Value
50 kW
N/A
Pb−Free Pkg
Level 1
Level 3
Level 1
Function
−65 to +150
−40 to +85
41 to 44
35 to 40
Rating
0 to 6
± 0.5
190
130
185
140
129
265
265
84
7
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Unit
mA
°C
°C
°C
V
V