MC100EPT24DG ON Semiconductor, MC100EPT24DG Datasheet - Page 2

no-image

MC100EPT24DG

Manufacturer Part Number
MC100EPT24DG
Description
IC XLATOR LVTTL/LVCMOS-ECL 8SOIC
Manufacturer
ON Semiconductor
Series
100EPTr
Datasheet

Specifications of MC100EPT24DG

Logic Function
Translator
Number Of Bits
1
Input Type
LVCMOS, LVTTL
Output Type
LVECL
Number Of Channels
1
Number Of Outputs/channel
1
Differential - Input:output
No/Yes
Propagation Delay (max)
0.8ns
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Supply Voltage
3 V ~ 3.6 V
Logic Type
Translator
Logic Family
ECL
Translation
LVCMOS/LVTTL to LVECL
Propagation Delay Time
0.8 ns
Supply Voltage (max)
- 3.6 V
Supply Voltage (min)
- 3 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Logical Function
Translator
Technology
ECL
High Level Output Current
-50mA
Low Level Output Current
50mA
Package Type
SOIC N
Operating Supply Voltage (min)
±3V
Abs. Propagation Delay Time
800ps
Mounting
Surface Mount
Pin Count
8
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Rate
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
MC100EPT24DGOS

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC100EPT24DG
Manufacturer:
ON Semiconductor
Quantity:
33
Part Number:
MC100EPT24DG
Manufacturer:
ON11
Quantity:
73
Part Number:
MC100EPT24DG
Manufacturer:
ON/安森美
Quantity:
20 000
Figure 1. 8−Lead Pinout (Top View) and Logic Diagram
V
NC
NC
EE
D
Table 2. ATTRIBUTES
1. For additional information, see Application Note AND8003/D.
1
2
3
4
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
LVTTL
Characteristics
LVECL
8
7
6
5
http://onsemi.com
Oxygen Index: 28 to 34
Charged Device Model
V
Q
Q
GND
CC
Human Body Model
Machine Model
2
TSSOP−8
SOIC−8
DFN8
Table 1. PIN DESCRIPTION
Q, Q
D
V
GND
V
NC
EP
PIN
CC
EE
Pb Pkg
Level 1
Level 1
Level 1
UL 94 V−0 @ 0.125 in
181 Devices
Differential LVECL Outputs
LVTTL Input
Positive Supply
Ground
Negative Supply
No Connect
(DFN8 only) Thermal exposed pad
must be connected to a sufficient
thermal conduit. Electrically connect to
the most negative supply (GND) or
leave unconnected, floating open.
FUNCTION
> 200 V
> 4 kV
> 2 kV
Value
N/A
N/A
Pb−Free Pkg
Level 1
Level 3
Level 1

Related parts for MC100EPT24DG