MC100ELT21DG ON Semiconductor, MC100ELT21DG Datasheet

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MC100ELT21DG

Manufacturer Part Number
MC100ELT21DG
Description
IC XLATOR TTL-PECL DIFF 8SOIC
Manufacturer
ON Semiconductor
Series
100ELTr
Datasheet
1.MC100ELT21DTR2G.pdf (8 pages)

Specifications of MC100ELT21DG

Logic Function
Translator
Number Of Bits
1
Input Type
PECL
Output Type
TTL
Number Of Channels
1
Number Of Outputs/channel
1
Differential - Input:output
Yes/No
Propagation Delay (max)
5.5ns
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Supply Voltage
4.75 V ~ 5.25 V
Logic Type
Translator
Logic Family
ECL
Translation
PECL to TTL
High Level Output Current
- 3 mA
Low Level Output Current
24 mA
Propagation Delay Time
5.5 ns @ 4.75 V to 5.25 V
Supply Voltage (max)
5.25 V
Supply Voltage (min)
4.75 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Rate
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
MC100ELT21DGOS

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Bonase Electronics (HK) Co., Limited Bonase Electronics (HK) Co., Limited
Part Number:
MC100ELT21DG
Manufacturer:
ON Semiconductor
Quantity:
100
MC10ELT21, MC100ELT21
5 V Differential PECL to
TTL Translator
Description
Because PECL (Positive ECL) levels are used, only +5 V and ground
are required. The small outline 8-lead package and the single gate of
the ELT21 makes it ideal for those applications where space,
performance and low power are at a premium.
this device only. For single-ended input conditions, the unused
differential input is connected to V
V
and V
to 0.5 mA. When not used, V
Features
•
•
•
•
•
•
© Semiconductor Components Industries, LLC, 2008
August, 2008 − Rev. 12
BB
The MC10ELT/100ELT21 is a differential PECL to TTL translator.
The V
The 100 Series contains temperature compensation.
3.5 ns Typical Propagation Delay
24 mA TTL Output
Flow Through Pinouts
Operating Range: V
Q Output Will Default LOW with Inputs Left Open or < 1.3 V
Pb−Free Packages are Available
may also rebias AC coupled inputs. When used, decouple V
CC
BB
via a 0.01 mF capacitor and limit current sourcing or sinking
pin, an internally generated voltage supply, is available to
CC
= 4.75 V to 5.25 V with GND = 0 V
BB
should be left open.
BB
as a switching reference voltage.
1
BB
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
CASE 506AA
MN SUFFIX
CASE 948R
DT SUFFIX
CASE 751
D SUFFIX
H
K
5C
2Q
M
TSSOP−8
*For additional marking information, refer to
8
(Note: Microdot may be in either location)
SOIC−8
Application Note AND8002/D.
DFN8
8
= MC10
= MC100
= MC10
= MC100
= Date Code
1
ORDERING INFORMATION
1
http://onsemi.com
8
1
8
1
MARKING DIAGRAMS*
ALYWG
HT21
A
L
Y
W
G
Publication Order Number:
1
HLT21
ALYW
G
G
4
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
8
1
MC10ELT21/D
8
1
KLT21
ALYW
ALYWG
1
KT21
G
G
4

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MC100ELT21DG Summary of contents

Page 1

MC10ELT21, MC100ELT21 5 V Differential PECL to TTL Translator Description The MC10ELT/100ELT21 is a differential PECL to TTL translator. Because PECL (Positive ECL) levels are used, only +5 V and ground are required. The small outline 8-lead package and the single ...

Page 2

NC 1 TTL D0 2 PECL Figure 1. 8−Lead Pinout and Logic Diagram (Top View) Table 2. ATTRIBUTES Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Moisture Sensitivity, Indefinite Time Out of Drypack ...

Page 3

Table 4. 10ELT SERIES PECL INPUT DC CHARACTERISTICS Symbol Characteristic V Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended Output Voltage Reference BB V Input HIGH Voltage Common Mode Range IHCMR (Differential Configuration) (Note 4) I ...

Page 4

AC CHARACTERISTICS 5.25 V; GND = 0.0 V (Note 8) CC Symbol Characteristic f Maximum Toggle Frequency max t Random Clock Jitter (RMS) JITTER t Propagation Delay @ 1.5 V PLH t Propagation Delay @ ...

Page 5

... MC10ELT21DG MC10ELT21DR2 MC10ELT21DR2G MC10ELT21DT MC10ELT21DTG MC10ELT21DTR2 MC10ELT21DTR2G MC10ELT21MNR4 MC10ELT21MNR4G MC100ELT21D MC100ELT21DG MC100ELT21DR2 MC100ELT21DR2G MC100ELT21DT MC100ELT21DTG MC100ELT21DTR2 MC100ELT21DTR2G MC100ELT21MNR4 MC100ELT21MNR4G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. ...

Page 6

... G C SEATING PLANE −Z− 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE 0.10 (0.004 SOLDERING FOOTPRINT* 1 ...

Page 7

K 8x REF 0.10 (0.004) 0.15 (0.006 L −U− PIN 1 IDENT 0.15 (0.006 −V− C 0.10 (0.004) D −T− G SEATING PLANE PACKAGE DIMENSIONS TSSOP−8 ...

Page 8

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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