MAX4112EUA Maxim Integrated, MAX4112EUA Datasheet - Page 10
![no-image](/images/no-image-200.jpg)
MAX4112EUA
Manufacturer Part Number
MAX4112EUA
Description
High Speed Operational Amplifiers
Manufacturer
Maxim Integrated
Datasheet
1.MAX4113ESA.pdf
(12 pages)
Specifications of MAX4112EUA
Number Of Channels
1
Input Offset Voltage
8 mV
Slew Rate
1200 V/us at +/- 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
uSOP
Common Mode Rejection Ratio (min)
45 dB
Maximum Power Dissipation
330 mW
Minimum Operating Temperature
- 40 C
Single/Dual/Quad, 400MHz, Low-Power,
Current Feedback Amplifiers
At low gains, G x R
bandwidth is essentially independent of closed-loop
gain. Similarly, Z
The MAX4112/MAX4113/MAX4117–MAX4120 have an
RF bandwidth and consequently require careful board
layout, including the possible use of constant-impedance
microstrip or stripline techniques.
To realize the full AC performance of these high-speed
amplifiers, pay careful attention to power-supply
bypassing and board layout. The PCB should have at
least two layers: a signal and power layer on one side,
and a large, low-impedance ground plane on the other
side. The ground plane should be as free of voids as
possible. With multilayer boards, locate the ground
plane on a layer that incorporates no signal or power
traces.
Regardless of whether a constant-impedance board is
used, observe the following guidelines when designing
the board. Wire-wrapped boards are much too induc-
tive, and breadboards are much too capacitive; neither
should be used. IC sockets increase parasitic capaci-
tance and inductance, and should not be used. In gen-
eral, surface-mount components give better high-
frequency performance than through-hole components.
They have shorter leads and lower parasitic reac-
tances. Keep lines as short and as straight as possible.
Do not make 90° turns; round all corners.
Observe high-frequency bypassing techniques to
maintain the amplifier’s accuracy. The bypass capaci-
tors should include a 1000pF ceramic capacitor
between each supply pin and the ground plane, locat-
ed as close to the package as possible. Next, place a
Table 1. Recommended Component Values
10
R
R
R
R
-3dB Small-Signal Bandwidth (MHz)
0.1dB Gain Flatness (MHz)
Large-Signal Bandwidth (MHz)
F
G
O
T
(Ω)
(Ω)
______________________________________________________________________________________
(Ω)
(Ω)
Layout and Power-Supply Bypassing
COMPONENT
V
OUT
V
IN
OL
IN
>> R
=
<< R
G
F
=
at low frequencies, so that:
F
. Therefore, the closed-loop
1
+
(
R / R
F
MAX4112
G
49.9
49.9
600
600
400
100
280
)
A
MAX4117
VCL
49.9
49.9
600
600
400
100
280
= +2
0.01µF to 0.1µF ceramic capacitor in parallel with each
1000pF capacitor, and as close to them as possible.
Then place a 10µF to 15µF low-ESR tantalum at the
point of entry (to the PCB) of the power-supply pins.
The power-supply trace should lead directly from the
tantalum capacitor to the V
mize parasitic inductance, keep PC traces short and
use surface-mount components.
Figure 2a. Inverting Gain Configuration
Figure 2b. Noninverting Gain Configuration
MAX4119
V
V
OUT
OUT
49.9
49.9
500
500
270
100
145
= -(R
= [1+ (R
V
R
IN
T
F
/R
G
F
) x V
/R
G
)] x V
V
IN
IN
MAX4113
R
R
G
IN
G
R
49.9
49.9
500
270
115
240
S
R
69
T
CC
A
R
R
MAX4118
F
F
and V
VCL
49.9
49.9
330
300
115
240
47
= +8
EE
MAX4112
MAX4113
MAX4117
MAX4118
MAX4119
MAX4120
MAX4112
MAX4113
MAX4117
MAX4118
MAX4119
MAX4120
pins. To mini-
R
R
O
O
MAX4120
49.9
49.9
330
300
115
240
47
V
V
OUT
OUT