SST39VF320-70-4C-B3KE Microchip Technology, SST39VF320-70-4C-B3KE Datasheet - Page 3

• Manufacturer Part Number: SST39VF320-70-4C-B3KE
• Description: Flash 2M X 16 70ns
• Manufacturer: Microchip Technology

Specifications of SST39VF320-70-4C-B3KE

• Product Category: Flash
• Rohs: yes
• Memory Size: 32 Mbit
• Interface Type: Parallel
• Access Time: 70 ns
• Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: TFBGA-48
• Organization: 2 MB x 16

32 Mbit Multi-Purpose Flash
SST39VF320
Data# Polling (DQ
When the SST39VF320 are in the internal Program opera-
tion, any attempt to read DQ
of the true data. Once the Program operation is completed,
DQ
may have valid data immediately following the completion
of an internal Write operation, the remaining data outputs
may still be invalid: valid data on the entire data bus will
appear in subsequent successive Read cycles after an
interval of 1 µs. During internal Erase operation, any
attempt to read DQ
Erase operation is completed, DQ
Data# Polling is valid after the rising edge of fourth WE# (or
CE#) pulse for Program operation. For Sector-, Block- or
Chip-Erase, the Data# Polling is valid after the rising edge
of sixth WE# (or CE#) pulse. See Figure 6 for Data# Polling
timing diagram and Figure 17 for a flowchart.
Toggle Bit (DQ
During the internal Program or Erase operation, any con-
secutive attempts to read DQ
and 0s, i.e., toggling between 1 and 0. When the internal
Program or Erase operation is completed, the DQ
stop toggling. The Toggle Bit is valid after the rising edge of
fourth WE# (or CE#) pulse for Program operation. For Sec-
tor-, Block- or Chip-Erase, the Toggle Bit is valid after the
rising edge of sixth WE# (or CE#) pulse. See Figure 7 for
Toggle Bit timing diagram and Figure 17 for a flowchart.
Data Protection
The SST39VF320 provide both hardware and software fea-
tures to protect nonvolatile data from inadvertent writes.
Hardware Data Protection
Noise/Glitch Protection: A WE# or CE# pulse of less than 5
ns will not initiate a write cycle.
V
inhibited when V
Write Inhibit Mode: Forcing OE# low, CE# high, or WE#
high will inhibit the Write operation. This prevents inadvert-
ent writes during power-up or power-down.
Software Data Protection (SDP)
The SST39VF320 provide the JEDEC approved Soft-
ware Data Protection scheme for all data alteration oper-
ations, i.e., Program and Erase. Any Program operation
requires the inclusion of the three-byte sequence. The
three-byte load sequence is used to initiate the Program
operation, providing optimal protection from inadvertent
©2003 Silicon Storage Technology, Inc.
DD
7
Power Up/Down Detection: The Write operation is
will produce true data. Note that even though DQ
DD
is less than 1.5V.
7
6
)
will produce a ‘0’. Once the internal
7
)
7
will produce the complement
6
will produce alternating 1s
7
will produce a ‘1’. The
6
bit will
7
3
Write operations, e.g., during the system power-up or
power-down. Any Erase operation requires the inclusion
of six-byte sequence. This group of devices are shipped
with the Software Data Protection permanently enabled.
See Table 4 for the specific software command codes.
During SDP command sequence, invalid commands will
abort the device to Read mode within T
DQ
SDP command sequence.
Common Flash Memory Interface (CFI)
The SST39VF320 also contain the CFI information to
describe the characteristics of the device. In order to
enter the CFI Query mode, the system must load the
three-byte sequence, similar to the Software ID Entry com-
mand. The last byte cycle of this command loads 98H (CFI
Query command) to address 5555H. Once the device
enters the CFI Query mode, the system can read CFI
data at the addresses given in Tables 5 through 7. The
system must write the CFI Exit command to return to
Read mode from the CFI Query mode.
Product Identification
The Product Identification mode identifies the devices as
the SST39VF320 and manufacturer as SST. This mode
may be accessed by software operations. Users may use
the Software Product Identification operation to identify
the part (i.e., using the device ID) when using multiple
manufacturers in the same socket. For details, see Table
4 for software operation, Figure 11 for the Software ID
Entry and Read timing diagram, and Figure 18 for the
Software ID Entry command sequence flowchart.
TABLE 1: P
Product Identification Mode Exit/
CFI Mode Exit
In order to return to the standard Read mode, the Software
Product Identification mode must be exited. Exit is accom-
plished by issuing the Software ID Exit command
sequence, which returns the device to the Read mode.
This command may also be used to reset the device to the
Read mode after any inadvertent transient condition that
apparently causes the device to behave abnormally, e.g.,
not read correctly. Please note that the Software ID Exit/
Manufacturer’s ID
Device ID
15
SST39VF320
-DQ
8
can be V
RODUCT
IL
or V
I
DENTIFICATION
IH
, but no other value, during any
Preliminary Specifications
Address
0000H
0001H
RC
S71143-02-000
. The contents of
00BFH
2783H
Data
T1.1 1143
11/03