SST25VF020B-80-4C-Q3AE Microchip Technology, SST25VF020B-80-4C-Q3AE Datasheet
SST25VF020B-80-4C-Q3AE
Specifications of SST25VF020B-80-4C-Q3AE
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SST25VF020B-80-4C-Q3AE Summary of contents
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... The 25 series Serial Flash family features a four-wire, SPI compatible interface that allows for a low pin-count package which occupies less board space and ulti- mately lowers total system costs. The SST25VF020B devices are enhanced with improved operating SST25VF020B SPI serial flash memories are manufactured with SST proprietary, high performance CMOS SuperFlash technology ...
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... Erase or Program operation is less than alternative flash memory technologies. The SST25VF020B device is offered in 8-lead SOIC (150 mils) 8-contact WSON (6mm x 5mm), and 8- contact USON (3mm x 2mm) packages. See Figure 2 for pin assignments. ...
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... Functional Block Diagram Figure 1: Functional Block Diagram ©2012 Silicon Storage Technology, Inc. 2 Mbit SPI Serial Flash X - Decoder Address Buffers and Latches Control Logic Serial Interface CE# SCK SST25VF020B Data Sheet SuperFlash Memory Y - Decoder I/O Buffers and Data Latches WP# HOLD# 1417 B1.0 DS25054B 09/12 ...
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... The Write Protect (WP#) pin is used to enable/disable BPL bit in the status reg- ister. To temporarily stop serial communication with SPI flash memory without reset- ting the device. To provide power supply voltage: 2.7-3.6V for SST25VF020B 4 2 Mbit SPI Serial Flash SST25VF020B Data Sheet ...
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... Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). The SST25VF020B supports both Mode 0 (0,0) and Mode 3 (1,1) of SPI bus operations. The difference between the two modes, as shown in Figure 3, is the state of the SCK signal when the bus master is in Stand-by mode and no data is being transferred ...
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... Figure 4: Hold Condition Waveform Write Protection SST25VF020B provides software Write protection. The Write Protect pin (WP#) enables or disables the lock-down function of the status register. The Block-Protection bits (BP1, BP0, and BPL) in the sta- tus register, and the Top/Bottom Sector Protection Status bits (TSP and BSP) in Status Register 1, pro- vide Write protection to the memory array and the status register ...
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... Reserved for future use Top Sector Protection status 1 = Indicates highest sector is write locked 0 = Indicates highest sector is Write accessible Bottom Sector Protection status 1 = Indicates lowest sector is write locked 0 = Indicates lowest sector is Write accessible Reserved for future use 7 SST25VF020B Data Sheet Default at Power-up Read/Write ...
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... Silicon Storage Technology, Inc. ), enables the Block-Protection-Lock-Down (BPL) bit. When BPL is set Status Register Bit BP1 BP0 Mbit SPI Serial Flash SST25VF020B Data Sheet 1 SST25VF020B FOR 2 Protected Memory Address 2 Mbit None 030000H-03FFFFH 020000H-03FFFFH 000000H-03FFFFH DS25054B T5.0 25054 09/12 ...
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... AAI-Word Program, Sector-Erase, Block-Erase, and Chip-Erase) will not be executed. Upon power-up, the TSP and BSP bits are automatically reset to ‘0’. ©2012 Silicon Storage Technology, Inc. 2 Mbit SPI Serial Flash 9 SST25VF020B Data Sheet DS25054B 09/12 ...
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... Instructions Instructions are used to read, write (Erase and Program), and configure the SST25VF020B. The instruction bus cycles are 8 bits each for commands (Op Code), data, and addresses. Prior to execut- ing any Byte-Program, Auto Address Increment (AAI) programming, Sector-Erase, Block-Erase, Write- Status-Register, or Chip-Erase instructions, the Write-Enable (WREN) instruction must be executed first ...
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... MODE 0 SCK SI MSB SO Figure 5: Read Sequence ©2012 Silicon Storage Technology, Inc ADD. ADD. ADD. MSB HIGH IMPEDANCE 11 2 Mbit SPI Serial Flash SST25VF020B Data Sheet N+1 N+2 N+3 N OUT ...
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... Silicon Storage Technology, Inc and a dummy byte. CE# must remain active low for the ADD. ADD. ADD. X MSB HIGH IMPEDANCE Mbit SPI Serial Flash SST25VF020B Data Sheet N+1 N+2 N+3 N OUT OUT ...
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... Silicon Storage Technology, Inc. CE# MODE SCK MODE 0 02 ADD. SI MSB MSB HIGH IMPEDANCE Mbit SPI Serial Flash SST25VF020B Data Sheet -A ]. Following the address, the data for the completion ADD. ADD. D ...
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... Enable-Latch bit (WEL=0) and AAI bit. Then execute the 8-bit DBSY command, 80H, to disable RY/ BY# status during the AAI command. See Figures 9 and 10. ©2012 Silicon Storage Technology, Inc. 2 Mbit SPI Serial Flash -A ] with The Hardware End-of-Write detection method is described in the BP. 14 SST25VF020B Data Sheet BP Fol with A =0, the second 23 ...
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... Figure 9: Disable SO as Hardware RY/BY# During AAI Programming ©2012 Silicon Storage Technology, Inc. 2 Mbit SPI Serial Flash CE# MODE MODE 0 SCK 70 SI MSB HIGH IMPEDANCE SO 1417 EnableSO.0 CE# MODE MODE 0 SCK 80 SI MSB HIGH IMPEDANCE SO 1417 DisableSO.0 15 SST25VF020B Data Sheet DS25054B 09/12 ...
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... User must configure the SO pin to output Flash Busy status during AAI programming register to load next valid Mbit SPI Serial Flash SST25VF020B Check for Flash Busy Status to load next valid command 0 ...
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... V X CE# MODE MODE 0 SCK 20 ADD. SI MSB MSB HIGH IMPEDANCE Mbit SPI Serial Flash SST25VF020B Data Sheet = Most Significant address) are used CE# must be driven high IL IH ADD. ADD. 1417 SecErase.0 DS25054B 09/12 ...
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... MODE 0 SCK 52 SI MSB HIGH IMPEDANCE SO CE# MODE MODE 0 SCK D8 SI MSB HIGH IMPEDANCE Mbit SPI Serial Flash SST25VF020B - remaining Address bits CE# must ADDR ADDR ADDR MSB 1417 32KBklEr ...
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... C7 SI MSB HIGH IMPEDANCE MSB HIGH IMPEDANCE 19 2 Mbit SPI Serial Flash SST25VF020B Data Sheet 1417 ChEr Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 MSB Status Register Out 1417 RDSRseq.0 DS25054B 09/12 ...
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... MSB HIGH IMPEDANCE CE# MODE MODE 0 SCK 06 SI MSB HIGH IMPEDANCE Mbit SPI Serial Flash SST25VF020B Data Sheet Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 MSB Status Register Out 1417 RDSR1seq.0 1417 WREN.0 ...
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... CE# must be driven low before the EWSR instruction is entered and must be driven high before the EWSR instruction is executed. ©2012 Silicon Storage Technology, Inc. 2 Mbit SPI Serial Flash CE# MODE MODE 0 SCK 04 SI MSB HIGH IMPEDANCE SO 1417 WRDI.0 21 SST25VF020B Data Sheet after executing the WRDI BP DS25054B 09/12 ...
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... MODE 3 MODE MSB MSB HIGH IMPEDANCE ) prior to the low-to-high transition of the CE# pin at the end Mbit SPI Serial Flash SST25VF020B Data Sheet STATUS REGISTER MSB 1417 EWSR.0 DS25054B 09/12 ...
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... Read-ID instruction, the 8-bit manufacturer’s ID, BFH, is output from the device. After that, a 16-bit device ID is shifted out on the SO pin. Byte 1, BFH, identifies the manufacturer as SST. Byte 2, 25H, identifies the memory type as SPI Serial Flash. Byte 3, 8CH, identifies the device as SST25VF020B. The instruction sequence is shown in Figure 22. The JEDEC Read ID instruction is terminated by a low to high transition on CE# at any time during data output ...
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... Read-ID (RDID) The Read-ID instruction (RDID) identifies the devices as SST25VF020B and manufacturer as SST. The device information can be read from executing an 8-bit command, 90H or ABH, followed by address bits [ Following the Read-ID instruction, the manufacturer’ located in address 00000H 23 0 and the device ID is located in address 00001H. Once the device is in Read-ID mode, the manufac- turer’ ...
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... Ambient Temp 0°C to +70°C -40°C to +85°C 1 Input Rise/Fall Time 5ns 25 2 Mbit SPI Serial Flash SST25VF020B Data Sheet 2.7-3.6V 2.7-3.6V Output Load ...
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... V DD 0.2 0 25°C, f=1 MHz, other pins open) A Description Output Pin Capacitance Input Capacitance Parameter Minimum Specification Endurance Data Retention Latch Mbit SPI Serial Flash SST25VF020B Test Conditions mA CE#=0.1 V /0.9 V @33 MHz, SO=open CE#=0.1 V /0.9 V @80 MHz, SO=open CE#=V DD µA CE#= ...
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... Relative to SCK. ©2012 Silicon Storage Technology, Inc. 2 Mbit SPI Serial Flash 33 MHz Parameter Min 13 13 0.1 0 and T requirements SCKH SCKL 27 SST25VF020B Data Sheet 80 MHz Max Min Max Units 33 80 MHz 0.1 V/ns 0.1 V/ ...
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... DH T SCKR MSB HIGH SCKH SCKL CLZ MSB HHH HLS Mbit SPI Serial Flash SST25VF020B Data Sheet T CPH T T CEH CHS T SCKF LSB HIGH-Z T CHZ LSB 1417 SerOut.0 T HHS T HLH T LZ DS25054B 1417 SerIn.0 1417 Hold.0 ...
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... V Min to Write Operation DD DD Chip selection is not allowed. Commands may not be accepted or properly interpreted by the device Mbit SPI Serial Flash SST25VF020B ramp rate of greater than 1V per 100 DD Minimum 100 100 PU-READ Device fully accessible PU-WRITE 1417 PwrUp.0 DS25054B Data Sheet Units µ ...
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... Silicon Storage Technology, Inc. Min Falling Time 1 DD Rising Time 0.033 DD Off Time 100 DD Off Level OFF GND Mbit SPI Serial Flash SST25VF020B Limits Max Units Conditions 100 ms/V 100 ms (recommended) 1417 F28.0 OFF DS25054B Data Sheet T16.0 25054 09/12 ...
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... Silicon Storage Technology, Inc INPUT REFERENCE POINTS V LT (0.9V ) for a logic “1” and V IHT DD 90%) are <5 ns. TO TESTER TO DUT 31 2 Mbit SPI Serial Flash SST25VF020B V HT OUTPUT V LT 1417 IORef.0 (0.1V ) for a logic “0”. Measure- ILT DD (0.6V ) and V (0.4V ). Input rise and HT DD ...
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... Operating Frequency MHz Device Density 020 = 2 Mbit Voltage V = 2.7-3.6V Product Series 25 = Serial Peripheral Interface flash memory 1. Environmental suffix “E” denotes non-Pb solder. SST non-Pb solder devices are “RoHS Compliant”. 2. Meets 100K minimum Endurance cycles. SST25VF020B-80-4C-Q3AE SST25VF020B-80-4I-Q3AE DS25054B 09/12 ...
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... Figure 31: 8-Lead Small Outline Integrated Circuit (SOIC) 150mil Body Width (5mm x 6mm) SST Package Code: SA ©2012 Silicon Storage Technology, Inc. SIDE VIEW TOP VIEW 1.27 BSC 0.25 0.10 4.00 3.80 1.75 6.20 1.35 5. Mbit SPI Serial Flash SST25VF020B Data Sheet 7° 4 places 0.51 0.33 END VIEW 45° 4 places 0.25 0.19 1.27 0.40 08-soic-5x6-SA-8 1mm DS25054B 7° ...
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... Figure 32:8-Contact Very-very-thin Small Outline No-lead (WSON) SST Package Code: QA ©2012 Silicon Storage Technology, Inc. TOP VIEW SIDE VIEW ± 5.00 0.10 ± 6.00 0.10 0.80 0. Mbit SPI Serial Flash SST25VF020B BOTTOM VIEW 0.2 4.0 0.076 3.4 0.05 Max CROSS SECTION 1mm 8-wson-5x6-QA-9.0 DS25054B Data Sheet Pin #1 1.27 BSC 0.48 0.35 ...
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... Silicon Storage Technology, Inc. 3.00 ±0.10 2.00 ±0.10 0.60 0.45 This paddle must be soldered to the PC board required to connect this paddle to the V Connection of this paddle to any other voltage potential will result in shorts and electrical malfunction of the device Mbit SPI Serial Flash SST25VF020B Data Sheet 2.45 0.25 ±0.05 1.60 0.08 0.2 0.05 Max 0.35 ±0.05 1mm 8-uson-2x2-Q3A-1 ...
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... Released document under new letter revision Updated Spec number from S71417 to DS25054 Added Q3AE package Silicon Storage Technology, Inc. A Microchip Technology Company www.microchip.com 36 2 Mbit SPI Serial Flash SST25VF020B Data Sheet Date Dec 2009 Feb 2010 Apr 2010 Feb 2011 Jan 2012 ...