S25FL512SDPMFI011 Spansion, S25FL512SDPMFI011 Datasheet - Page 63

• Manufacturer Part Number: S25FL512SDPMFI011
• Description: Flash 512Mb 3V 66MHz Serial NOR Flash
• Manufacturer: Spansion

Specifications of S25FL512SDPMFI011

• Rohs: yes
• Memory Type: Flash
• Memory Size: 512 MB
• Architecture: Uniform
• Timing Type: Asynchronous
• Interface Type: SPI
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SO-16

June 13, 2012 S25FL512S_00_04
8.6.9
8.6.10
8.6.11
PPB Access Register (PPBAR)
DYB Access Register (DYBAR)
SPI DDR Data Learning Registers
Related Commands: PPB Read (PPBRD E2h)
Related Commands: DYB Read (DYBRD E0h) and DYB Program (DYBP E1h).
Related Commands: Program NVDLR (PNVDLR 43h), Write VDLR (WVDLR 4Ah), Data Learning Pattern
Read (DLPRD 41h).
The Data Learning Pattern (DLP) resides in an 8-bit Non-Volatile Data Learning Register (NVDLR) as well as
an 8-bit Volatile Data Learning Register (VDLR). When shipped from Spansion, the NVDLR value is 00h.
Once programmed, the NVDLR cannot be reprogrammed or erased; a copy of the data pattern in the NVDLR
will also be written to the VDLR. The VDLR can be written to at any time, but on reset or power cycles the
data pattern will revert back to what is in the NVDLR. During the learning phase described in the SPI DDR
modes, the DLP will come from the VDLR. Each IO will output the same DLP value for every clock edge. For
example, if the DLP is 34h (or binary 00110100) then during the first clock edge all IO’s will output 0;
subsequently, the 2nd clock edge all I/O’s will output 0, the 3rd will output 1, etc.
When the VDLR value is 00h, no preamble data pattern is presented during the dummy phase in the DDR
commands.
7 to 0
7 to 0
7 to 0
7 to 0
Bits
Bits
Bits
Bits
Field Name
Field Name
Field Name
NVDLP
Field Name
VDLP
DYB
D a t a
PPB
per sector DYB
Read or Write
Data Learning
Volatile Data
Non-Volatile
S h e e t
Function
Function
Function
Learning
Pattern
Pattern
Read or Program per
Table 8.17 Non-Volatile Data Learning Register (NVDLR)
sector PPB
Table 8.18 Volatile Data Learning Register (NVDLR)
Function
Table 8.16 DYB Access Register (DYBAR)
Table 8.15 PPB Access Register (PPBAR)
( P r e l i m i n a r y )
Volatile
Volatile
Type
Type
Type
OTP
S25FL512S
Default State
Default State
Default State
Non-volatile
during POR
Takes the
or Reset
value of
NVDLR
Type
FFh
00h
00h = DYB for the sector addressed by the DYBRD or DYBP
command is cleared to 0, protecting that sector from program or
erase operations.
FFh = DYB for the sector addressed by the DYBRD or DYBP
command is set to 1, not protecting that sector from program or
erase operations.
OTP value that may be transferred to the host during DDR read
command latency (dummy) cycles to provide a training pattern to
help the host more accurately center the data capture point in the
received data bits.
Volatile copy of the NVDLP used to enable and deliver the Data
Learning Pattern (DLP) to the outputs. The VDLP may be changed
by the host during system operation.
Default
State
FFh
00h = PPB for the sector addressed by the PPBRD or
PPBP command is programmed to 0, protecting that
sector from program or erase operations.
FFh = PPB for the sector addressed by the PPBRD or
PPBP command is erased to 1, not protecting that
sector from program or erase operations.
Description
Description
Description
Description
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