1894KI-32LFT IDT, 1894KI-32LFT Datasheet - Page 44

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1894KI-32LFT

Manufacturer Part Number
1894KI-32LFT
Description
Ethernet ICs 3.3V 10/100 PHY RMII
Manufacturer
IDT
Datasheet

Specifications of 1894KI-32LFT

Rohs
yes
Part # Aliases
ICS1894KI-32LFT
Reset: Hardware Reset and Power-Down
Hardware Reset and Power-Down Timing Diagram
IDT® 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
ICS1894-32
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
RESETn
TXCLK Valid
Power
Consumption
(AC only)
REFIN
The table below lists the significant time periods for the hardware reset and power-down reset. The time periods
consist of timings of signals on the following pins:
The Hardware Reset and Power-Down Timing Diagram shows the timing diagram for the time periods.
Period
Time
REFIN
RESETn
TXCLK
t1
t2
t3
RESETn Active to Device Isolation and Initialization
Minimum RESETn Pulse Width
RESETn Released to TXCLK Valid
t1
Parameter
t2
t3
44
Conditions
Min. Typ. Max
200
ICS1894-32
60
35
500
.
PHYCEIVER
REV M 021512
Units
ms
ns
ns

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