1893CFLF IDT, 1893CFLF Datasheet - Page 51
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1893CFLF
Manufacturer Part Number
1893CFLF
Description
Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
Manufacturer
IDT
Datasheet
1.1893CFLF.pdf
(121 pages)
Specifications of 1893CFLF
Rohs
yes
Part # Aliases
ICS1893CFLF
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Part Number:
1893CFLFT
Manufacturer:
IDT
Quantity:
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7.3.2 100Base-TX Full Duplex (bit 1.14)
7.3.3 100Base-TX Half Duplex (bit 1.13)
7.3.4 10Base-T Full Duplex (bit 1.12)
7.3.5 10Base-T Half Duplex (bit 1.11)
ICS1893CK-40, Rev. C, 06/02/09
The STA reads this bit to learn if the ICS1893CK-40 can support 100Base-TX, full-duplex operations. The
ISO/IEC specification requires that the ICS1893CK-40 must set bit 1.14 to logic:
•
•
Bit 1.14 is a Command Override Write bit, which allows an STA to alter the default value of this bit. [See the
description of bit 16.15, the Command Override Write Enable bit, in
Control
The STA reads this bit to learn if the ICS1893CK-40 can support 100Base-TX, half-duplex operations. The
ISO/IEC specification requires that the ICS1893CK-40 must set bit 1.13 to logic:
•
•
This bit 1.13 is a Command Override Write bit, which allows an STA to alter the default value of this bit.
[See the description of bit 16.15, the Command Override Write Enable bit, in
Extended Control
The STA reads this bit to learn if the ICS1893CK-40 can support 10Base-T, full-duplex operations. The
ISO/IEC specification requires that the ICS1893CK-40 must set bit 1.12 to logic:
•
•
This bit 1.12 is a Command Override Write bit, which allows an STA to alter the default value of this bit.
[See the description of bit 16.15, the Command Override Write Enable bit, in
Extended Control
The STA reads this bit to learn if the ICS1893CK-40 can support 10Base-T, half-duplex operations. The
ISO/IEC specification requires that the ICS1893CK-40 must set bit 1.11 to logic:
•
•
Bit 1.11 of the ICS1893CK-40 Status Register is a Command Override Write bit., which allows an STA to
alter the default value of this bit. [See the description of bit 16.15, the Command Override Write Enable bit,
in
Zero if it cannot support 100Base-TX, full-duplex operations.
One if it can support 100Base-TX, full-duplex operations. (For the ICS1893CK-40, the default value of bit
1.14 is logic one, in that the ICS1893CK-40 supports 100Base-TX, full-duplex operations.)
Zero if it cannot support 100Base-TX, half-duplex operations.
One if it can support 100Base-TX, half-duplex operations. (For the ICS1893CK-40, the default value of
bit 1.13 is logic one. Therefore, when an STA reads the Status Register, the STA is informed that the
ICS1893CK-40 supports 100Base-TX, half-duplex operations.)
Zero if it cannot support 10Base-T, full-duplex operations.
One if it can support 10Base-T, full-duplex operations. (For the ICS1893CK-40, the default value of bit
1.12 is logic one. Therefore, when an STA reads the Status Register, the STA is informed that the
ICS1893CK-40 supports 10Base-T, full-duplex operations.)
Zero if it cannot support 10Base-T, half-duplex operations.
One if it can support 10Base-T, half-duplex operations. (For the ICS1893CK-40, the default value of bit
1.11 is logic one. Therefore, when an STA reads the Status Register, the STA is informed that the
ICS1893CK-40 supports 10Base-T, half-duplex operations.)
Section 7.11, “Register 16: Extended Control
Register”.]
ICS1893CK-40 Data Sheet Rev. C - Release
Register”.]
Register”.]
Copyright © 2009, Integrated Device Technology, Inc.
All rights reserved.
Register”.]
51
Section 7.11, “Register 16: Extended
Chapter 7 Management Register Set
Section 7.11, “Register 16:
Section 7.11, “Register 16:
June 2009