LCMXO2-256ZE-2SG32CES Lattice, LCMXO2-256ZE-2SG32CES Datasheet - Page 18
LCMXO2-256ZE-2SG32CES
Manufacturer Part Number
LCMXO2-256ZE-2SG32CES
Description
FPGA - Field Programmable Gate Array 256 LUTs 22 I/O 1.2V engineering sample
Manufacturer
Lattice
Datasheet
1.LCMXO2-256HC-4SG32I.pdf
(106 pages)
Specifications of LCMXO2-256ZE-2SG32CES
Rohs
yes
Maximum Operating Frequency
125 MHz
Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
QFN-32
Minimum Operating Temperature
0 C
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Figure 2-11. Group of Four Programmable I/O Cells
Notes:
1. Input gearbox is available only in PIC on the bottom edge of MachXO2-640U, MachXO2-1200/U and larger devices.
2. Output gearbox is available only in PIC on the top edge of MachXO2-640U, MachXO2-1200/U and larger devices.
Core Logic/
Routing
1 PIC
Gearbox
Input
Gearbox
Output
2-14
Register Block
Register Block
Register Block
Register Block
Register Block
Register Block
Register Block
Register Block
Input Register
Input Register
Input Register
Input Register
& Tristate
& Tristate
& Tristate
& Tristate
Output
Output
Output
Output
Block
Block
Block
Block
PIO A
PIO B
PIO C
PIO D
MachXO2 Family Data Sheet
Pin
Pin
Pin
Pin
A
B
C
D
Architecture
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