LFE3-95EA-6LFN1156C Lattice, LFE3-95EA-6LFN1156C Datasheet - Page 29
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LFE3-95EA-6LFN1156C
Manufacturer Part Number
LFE3-95EA-6LFN1156C
Description
FPGA - Field Programmable Gate Array 92K LUTs 310 I/O 1.2V -6 SPEED
Manufacturer
Lattice
Datasheet
1.LFE3-95EA-7LFN672I.pdf
(141 pages)
Specifications of LFE3-95EA-6LFN1156C
Rohs
yes
Factory Pack Quantity
24
Available stocks
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Quantity
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Company:
Part Number:
LFE3-95EA-6LFN1156C
Manufacturer:
Lattice Semiconductor Corporation
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MMAC DSP Element
The LatticeECP3 supports a MAC with two multipliers. This is called Multiply Multiply Accumulate or MMAC. In this
case, the two operands, AA and AB, are multiplied and the result is added with the previous accumulated value and
with the result of the multiplier operation of operands BA and BB. This accumulated value is available at the output.
The user can enable the input and pipeline registers, but the output register is always enabled. The output register
is used to store the accumulated value. The ALU is configured as the accumulator in the sysDSP slice. A registered
overflow signal is also available. The overflow conditions are provided later in this document. Figure 2-28 shows the
MMAC sysDSP element.
Figure 2-28. MMAC sysDSP Element
DSP Slice
Previous
IR = Input Register
PR = Pipeline Register
OR = Output Register
FR = Flag Register
Rounding
SRIB
SRIA
C_ALU
A_ALU
CIN
0
IR
C
IR
AA
MULTA
OR
PR
AMUX
A_ALU
IR
From FPGA Core
AB
To FPGA Core
0
R = Logic (B, C)
R= A ± B ± C
2-26
OR
PR
IR
OPCODE
FR
0
=
=
B_ALU
BMUX
IR
ALU
BA
MULTB
LatticeECP3 Family Data Sheet
OR
PR
IR
BB
IR
COUT
SROB
SROA
DSP Slice
Next
Architecture
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