LFE3-35EA-6LFTN256I Lattice, LFE3-35EA-6LFTN256I Datasheet - Page 61
LFE3-35EA-6LFTN256I
Manufacturer Part Number
LFE3-35EA-6LFTN256I
Description
FPGA - Field Programmable Gate Array 33.3K LUTs 133 I/O 1.2V -6 SPEED
Manufacturer
Lattice
Datasheet
1.LFE3-95EA-7LFN672I.pdf
(141 pages)
Specifications of LFE3-35EA-6LFTN256I
Rohs
yes
Factory Pack Quantity
90
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE3-35EA-6LFTN256I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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sysI/O Differential Electrical Characteristics
LVDS25
Differential HSTL and SSTL
Differential HSTL and SSTL outputs are implemented as a pair of complementary single-ended outputs. All allow-
able single-ended output classes (class I and class II) are supported in this mode.
V
V
V
I
V
V
V
V
V
V
I
1, On the left and right sides of the device, this specification is valid only for V
Parameter
IN
SAB
INP
CM
THD
OH
OL
OD
OS
OD
OS
1
1
, V
INM
1
Input Voltage
Input Common Mode Voltage
Differential Input Threshold
Input Current
Output High Voltage for V
Output Low Voltage for V
Output Voltage Differential
Change in V
Low
Output Voltage Offset
Change in V
Output Short Circuit Current
Description
OD
OS
Between High and
Between H and L
Over Recommended Operating Conditions
OP
OP
or V
or V
OM
OM
Half the Sum of the Two Inputs
Difference Between the Two Inputs
Power On or Power Off
R
R
(V
(V
V
Each Other
OD
T
T
OP
OP
= 100 Ohm
= 100 Ohm
= 0V Driver Outputs Shorted to
- V
+ V
OM
OM
3-8
Test Conditions
), R
)/2, R
T
= 100 Ohm
T
CCIO
= 100 Ohm
= 2.5V or 3.3V.
DC and Switching Characteristics
LatticeECP3 Family Data Sheet
+/-100
1.125
Min.
0.05
0.9V
250
—
—
—
—
—
0
Typ.
1.38
1.03
1.20
350
—
—
—
—
—
—
—
1.375
Max.
+/-10
2.35
1.60
450
2.4
50
50
12
—
—
Units
mV
mV
mV
mV
mA
µA
V
V
V
V
V
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