LFE3-150EA-7LFN672I Lattice, LFE3-150EA-7LFN672I Datasheet - Page 48
LFE3-150EA-7LFN672I
Manufacturer Part Number
LFE3-150EA-7LFN672I
Description
FPGA - Field Programmable Gate Array 149K LUTs 380 I/O 1.2V -7 SPEED
Manufacturer
Lattice
Datasheet
1.LFE3-95EA-7LFN672I.pdf
(141 pages)
Specifications of LFE3-150EA-7LFN672I
Rohs
yes
Number Of Gates
149 K
Number Of Logic Blocks
372
Embedded Block Ram - Ebr
6850 Kbit
Number Of I/os
380
Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
FPBGA-672
Distributed Ram
303 Kbit
Minimum Operating Temperature
- 40 C
Operating Supply Current
219.5 mA
Factory Pack Quantity
40
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE3-150EA-7LFN672I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Figure 2-40. SERDES/PCS Quads (LatticeECP3-150)
Table 2-13. LatticeECP3 SERDES Standard Support
PCI Express 1.1
Gigabit Ethernet
SGMII
XAUI
Serial RapidIO Type I,
Serial RapidIO Type II,
Serial RapidIO Type III
CPRI-1,
CPRI-2,
CPRI-3,
CPRI-4
SD-SDI
(259M, 344M)
HD-SDI
(292M)
3G-SDI
(424M)
SONET-STS-3
SONET-STS-12
SONET-STS-48
1. For slower rates, the SERDES are bypassed and CML signals are directly connected to the FPGA routing.
2. The SONET protocol is supported in 8-bit SERDES mode. See TN1176
Standard
2
2
2
sysIO Bank 0
SERDES/PCS
1250, 2500
Quad D
Data Rate
(Mbps)
1228.8,
2457.6,
1483.5,
3072.0
155.52
622.08
614.4,
1250,
2500,
2967,
2500
1250
3125
3125
143
177
1485
2970
2488
270,
360,
540
1
1
,
,
SERDES/PCS
Quad B
2-45
SERDES/PCS
Quad A
Lattice ECP3 SERDES/PCS Usage Guide
sysIO Bank 1
General/Link Width
Number of
x1, x2, x4
x1, x4
SERDES/PCS
x1
x1
x4
x1
x1
x1
x1
x1
x1
x1
Quad C
LatticeECP3 Family Data Sheet
NRZI/Scrambled
NRZI/Scrambled
NRZI/Scrambled
Encoding Style
for more information.
8b10b
8b10b
8b10b
8b10b
8b10b
8b10b
Architecture
N/A
N/A
N/A
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