MAX3395EEBC+T Maxim Integrated Products, MAX3395EEBC+T Datasheet - Page 11
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MAX3395EEBC+T
Manufacturer Part Number
MAX3395EEBC+T
Description
IC LVL XLTR LV 6MBPS 12-UCSP
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX3394EEBLT.pdf
(20 pages)
Specifications of MAX3395EEBC+T
Logic Function
Translator, Bidirectional, 3-State
Number Of Bits
4
Input Type
Logic
Output Type
Logic
Data Rate
6Mbps
Number Of Channels
4
Number Of Outputs/channel
1
Differential - Input:output
No/No
Propagation Delay (max)
50ns
Voltage - Supply
1.65 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
12-UCSP®
Supply Voltage
1.65 V ~ 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
±15kV ESD-Protected, High-Drive Current, Dual-/Quad-/
Figure 6a. Human Body ESD Test Model
The high-impedance state of the I/O lines during tri-
state output mode facilitates use in multidrop networks.
In tri-state output mode, do not exceed (V
I/O V
The MAX3394E/MAX3395E/MAX3396E are protected
from thermal damage resulting from short-circuit faults.
In the event of a short-circuit fault, when the junction
temperature (T
forces the device into the tri-state output mode. When
T
As with all Maxim devices, ESD-protection structures are
incorporated on all pins to protect against ESD encoun-
tered during handling and assembly. The I/O V
are further protected by advanced ESD structures to
guard these pins from damage caused by ESD of up to
±15kV. Protection structures prevent damage caused by
ESD events in normal operation, tri-state output mode,
and when the device is unpowered. After arresting an
ESD event, MAX3394E/MAX3395E/MAX3396E continue
to function without latching up, whereas competing
devices can enter a latched-up state and must be power
cycled to restore functionality.
Several ESD testing standards exist for gauging the
robustness of ESD structures. The ESD protection of
the MAX3394E/MAX3395E/MAX3396E is characterized
for the human body model (HBM). Figure 6a shows the
model used to simulate an ESD event resulting from
contact with the human body. The model consists of a
100pF storage capacitor that is charged to a high volt-
age then discharged through a 1.5kΩ resistor. Figure
6b shows the current waveform when the storage
capacitor is discharged into a low impedance.
J
drops below +115°C, normal operation resumes.
VOLTAGE
SOURCE
HIGH-
DC
L
_ or (V
CHARGE-CURRENT-
LIMIT RESISTOR
Octal-Level Translators with Speed-Up Circuitry
CC
1MΩ
+ 0.3V) on I/O V
J
R
100pF
C
) reaches +125°C, a thermal sensor
Thermal-Shutdown Protection
______________________________________________________________________________________
C s
STORAGE
CAPACITOR
RESISTANCE
1500Ω
DISCHARGE
R
±15kV ESD Protection
D
CC
_.
L
+ 0.3V) on
DEVICE-
UNDER-
CC
TEST
_ lines
To ensure full ±15kV ESD protection, bypass V
ground with a 0.1µF ceramic capacitor and an additional
1µF ceramic capacitor as close to the device as possible.
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report documenting test
setup, methodology, and results.
Bypass V
capacitors. To ensure full ±15kV ESD protection,
bypass V
ceramic capacitor. Place all capacitors as close to the
device as possible.
The MAX3394E/MAX3395E/MAX3396E are compatible
with push-pull (active) and open-drain drivers. For push-
pull operation, maximum data rate is guaranteed to
6Mbps. For open-drain applications, the MAX3394E/
MAX3395E/MAX3396E include internal pullup resistors
and slew-rate enhancement circuitry, providing a maxi-
mum data rate of 1Mbps. External pullup resistors can
be added to increase data rate when the bus is loaded
by high capacitance. (See the Use of External Pullup
Resistors section.)
The MAX3395E provides level translation on four I/O
lines, making it an ideal device for multivoltage I
MICROWIRE, and SPI serial interfaces.
The MAX3394E/MAX3395E/MAX3396E include internal
10kΩ pullup resistors. During a low-to-high logic transi-
tion, the internal pullup resistors charge the bus capac-
Figure 6b. HBM Discharge Current Waveform
AMPERES
I
P
36.8%
100%
90%
10%
Open-Drain Mode vs. Push-Pull Mode
CC
0
L
0
and V
to ground with an additional 1µF or greater
Use of External Pullup Resistors
t
RL
Applications Information
CC
Serial-Interface Level Translation
Power-Supply Decoupling
to ground with 0.1µF ceramic
CURRENT WAVEFORM
TIME
t
DL
ESD Test Conditions
I r
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
CC
2
11
C,
to