DS28E01-100+ Maxim Integrated, DS28E01-100+ Datasheet - Page 17

• Manufacturer Part Number: DS28E01-100+
• Description: EEPROM
• Manufacturer: Maxim Integrated

48µs at overdrive speed to accommodate other 1-Wire
devices.
Data communication with the DS28E01-100 takes place
in time slots that carry a single bit each. Write time slots
transport data from bus master to slave. Read time
slots transfer data from slave to master. Figure 12 illus-
trates the definitions of the write and read time slots.
All communication begins with the master pulling the
data line low. As the voltage on the 1-Wire line falls
below the threshold V
internal timing generator that determines when the data
line is sampled during a write time slot and how long
data is valid during a read time slot.
For a write-one time slot, the voltage on the data line
must have crossed the V
one low time t
slot, the voltage on the data line must stay below the
V
expired. For the most reliable communication, the volt-
age on the data line should not exceed V
the entire t
has been crossed, the DS28E01-100 needs a recovery
time t
Figure 11. Initialization Procedure: Reset and Presence Pulse
Maxim Integrated
TH
threshold until the write-zero low time t
REC
before it is ready for the next time slot.
V
W0L
IHMASTER
V
ILMAX
V
W1LMAX
PUP
V
V
0V
TH
TL
or t
W1L
is expired. For a write-zero time
TL
window. After the V
t
F
ABRIDGED DATA SHEET
, the DS28E01-100 starts its
TH
Read/Write Time Slots
MASTER Tx "RESET PULSE"
threshold before the write-
RESISTOR
Master-to-Slave
1Kb Protected 1-Wire EEPROM
t
RSTL
ILMAX
TH
W0LMIN
threshold
during
is
ε
A read-data time slot begins like a write-one time slot.
The voltage on the data line must remain below V
until the read low time t
window, when responding with a 0, the DS28E01-100
starts pulling the data line low; its internal timing gener-
ator determines when this pulldown ends and the volt-
age starts rising again. When responding with a 1, the
DS28E01-100 does not hold the data line low at all, and
the voltage starts rising as soon as t
The sum of t
nal timing generator of the DS28E01-100 on the other
side define the master sampling window (t
t
from the data line. For the most reliable communication,
t
should read close to but no later than t
reading from the data line, the master must wait until
t
time t
time slot. Note that t
a single DS28E01-100 attached to a 1-Wire line. For
multidevice configurations, t
accommodate the additional 1-Wire device input
capacitance. Alternatively, an interface that performs
active pullup during the 1-Wire recovery time such as
the DS2482-x00 or DS2480B 1-Wire drivers can be
used.
MASTER
MSRMAX
RL
SLOT
t
PDH
should be as short as permissible, and the master
REC
t
is expired. This guarantees sufficient recovery
MSP
), in which the master must perform a read
MASTER Rx "PRESENCE PULSE"
for the DS28E01-100 to get ready for the next
with SHA-1 Engine
t
PDL
RL
t
RSTH
+ δ (rise time) on one side and the inter-
REC
DS28E01-100
specified herein applies only to
RL
t
REC
is expired. During the t
REC
DS28E01-100
must be extended to
RL
Slave-to-Master
is over.
MSRMAX
MSRMIN
. After
RL
TL
29
to